llvm-svn: 48224

llvm-svn: 48199

llvm-svn: 48167

Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130

an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

llvm-svn: 48107

RST -> RFP{32/64/80}.  We only handle ST(0) for now.

llvm-svn: 48104

llvm-svn: 48101

llvm-svn: 47524

No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case.

llvm-svn: 47522

llvm-svn: 47476

llvm-svn: 47043

It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.

llvm-svn: 46893

llvm-svn: 46866

llvm-svn: 46849

llvm-svn: 45896

This allows us to sink things like:
	cvtsi2sd	32(%esp), %xmm1
when reading from the argument area, for example.

llvm-svn: 45895

llvm-svn: 45871

llvm-svn: 45870

both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad. 

It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags.  Now the clients
can decide everything they need.

I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.

llvm-svn: 45843

or being side-effect free.

llvm-svn: 45816

llvm-svn: 45768

llvm-svn: 45699

Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695

llvm-svn: 45680

llvm-svn: 45679

over to using them, instead of diddling Flags directly.  Change the
various flags from const variables to enums.

llvm-svn: 45677

that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

Some day I'll get it all moved over...

llvm-svn: 45672

llvm-svn: 45638

checking that there was a from a global instead of a load from the stub
for a global, which is the one that's safe to hoist.

Consider this program:

volatile char G[100];
int B(char *F, int N) {
  for (; N > 0; --N)
    F[N] = G[N];
}

In static mode, we shouldn't be hoisting the load from G:

$ llc -relocation-model=static -o - a.bc -march=x86 -machine-licm

LBB1_1: # bb.preheader
        leal    -1(%eax), %edx
        testl   %edx, %edx
        movl    $1, %edx
        cmovns  %eax, %edx
        xorl    %esi, %esi
LBB1_2: # bb
        movb    _G(%eax), %bl
        movb    %bl, (%ecx,%eax)

llvm-svn: 45626

for remat, but can't due to an RA bug.

llvm-svn: 45623

llvm-svn: 45622

llvm-svn: 45621

isReallySideEffectFree and isReallyTriviallyReMaterializable.  Why is a load from
a global considered side-effect-free but not rematable?

llvm-svn: 45620

llvm-svn: 45603

check that register isn't 0 before going further.

llvm-svn: 45498

llvm-svn: 45484

Fix a bug in my previous patch: refer to the impl not the pure virtual version.  It's unclear why gcc would ever compile this...

llvm-svn: 45476

a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475

Machine-level API cleanup instigated by Chris.

llvm-svn: 45470