llvm-svn: 60499

an area where eventually it would be good to use target-dependent
information.

llvm-svn: 60498

llvm-svn: 60497

examining non-anti-dependence edges.

llvm-svn: 60496

llvm-svn: 60495

llvm-svn: 60494

llvm-svn: 60492

parts, and add target-independent code to add/preserve
MachineMemOperands.

llvm-svn: 60488

llvm-svn: 60487

the frame reference. This will help post-RA scheduling determine
that spills to distinct stack slots are independent.

llvm-svn: 60486

llvm-svn: 60485

llvm-svn: 60484

a new node if the node was actually remapped.

llvm-svn: 60482

Print a single parameter .file directive if we have an ELF target.

llvm-svn: 60480

llvm-svn: 60479

llvm-svn: 60478

llvm-svn: 60477

llvm-svn: 60476

llvm-svn: 60471

1) have it fold "br undef", which does occur with
   surprising frequency as jump threading iterates.
2) teach j-t to delete dead blocks.  This removes the successor
   edges, reducing the in-edges of other blocks, allowing 
   recursive simplification.
3) Fold things like:
     br COND, BBX, BBY
  BBX:
     br COND, BBZ, BBW

   which also happens because jump threading iterates.

llvm-svn: 60470

llvm-svn: 60469

llvm-svn: 60468

loop deletion (it is for a ton of passes), which is very bad.

llvm-svn: 60465

unconditionally delete the block.  All likely clients will
do the checking anyway.

llvm-svn: 60464

DeleteBlockIfDead method.

llvm-svn: 60463

foldMemoryOperand how to "fold" them, by converting them into constant-pool
loads. When they aren't folded, they use xorps/cmpeqd, but for example when
register pressure is high, they may now be folded as memory operands, which
reduces register pressure.

Also, mark V_SET0 isAsCheapAsAMove so that two-address-elimination will
remat it instead of copying zeros around (V_SETALLONES was already marked).

llvm-svn: 60461

llvm-svn: 60460

is set but mayLoad is not set. Fix all the problems this turned up.

Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.

llvm-svn: 60459

llvm-svn: 60458

llvm-svn: 60457

llvm-svn: 60456

than just i32.

llvm-svn: 60455

delegates to the regular x86-32 convention which handles byval, but only
after it handles a few cases, and it's necessary to handle byval before
handling those cases. This fixes PR3122 (and rdar://6400815), llvm-gcc
miscompiling LLVM.

llvm-svn: 60453

llvm-svn: 60451

llvm-svn: 60449

used by clang apparently.

llvm-svn: 60446

1. ppcf128 select is expanded to f64 select's.
2. f64 select operand 0 is an i1 truncate, it's promoted to i32 zero_extend.
3. f64 select is updated. It's changed back to a "NewNode" and being re-analyzed.
4. f64 select operands are being processed. Operand 0 is a "NewNode". It's being expunged out of ReplacedValues map.
5. ExpungeNode tries to remap f64 select and notice it's a "NewNode" and assert.
Duncan, please take a look. Thanks.

llvm-svn: 60443

llvm-svn: 60442

consistent with the way it's generally done in other places.

llvm-svn: 60439

- Incorporate Tilmann Scheller's ISD::TRUNCATE custom lowering patch
- Update SPU calling convention info, even if it's not used yet (but can be
  at some point or another)
- Ensure that any-extended f32 loads are custom lowered, especially when
  they're promoted for use in printf.

llvm-svn: 60438