Skip to content
  1. Aug 06, 2010
  2. Aug 05, 2010
  3. Jun 19, 2010
    • Evan Cheng's avatar
      Allow ARM if-converter to be run after post allocation scheduling. · 2d51c7c5
      Evan Cheng authored
      - This fixed a number of bugs in if-converter, tail merging, and post-allocation
        scheduler. If-converter now runs branch folding / tail merging first to
        maximize if-conversion opportunities.
      - Also changed the t2IT instruction slightly. It now defines the ITSTATE
        register which is read by instructions in the IT block.
      - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
        change the instruction ordering in the IT block (since IT mask has been
        finalized). It also ensures no other instructions can be scheduled between
        instructions in the IT block.
      
      This is not yet enabled.
      
      llvm-svn: 106344
      2d51c7c5
  4. May 18, 2010
  5. May 14, 2010
  6. Apr 15, 2010
  7. Apr 13, 2010
  8. Apr 08, 2010
  9. Feb 09, 2010
  10. Jan 05, 2010
    • Jakob Stoklund Olesen's avatar
      Remove livein checks from machine code verifier. · 4cb7702c
      Jakob Stoklund Olesen authored
      A phi operand that is implicitly defined in a predecessor becomes an undefined
      register after phi elimination. This causes a lot of false positives when the
      verifier is checking if live-in registers are live-out from all predecessors.
      
      Removing the verifier checks seems like a better solution than insisting on
      IMPLICIT_DEF instructions in predecessor blocks.
      
      llvm-svn: 92769
      4cb7702c
  11. Dec 22, 2009
  12. Dec 05, 2009
  13. Nov 20, 2009
  14. Nov 18, 2009
  15. Nov 13, 2009
  16. Oct 31, 2009
    • Dan Gohman's avatar
      Make -print-machineinstrs more readable. · 34341e69
      Dan Gohman authored
       - Be consistent when referring to MachineBasicBlocks: BB#0.
       - Be consistent when referring to virtual registers: %reg1024.
       - Be consistent when referring to unknown physical registers: %physreg10.
       - Be consistent when referring to known physical registers: %RAX
       - Be consistent when referring to register 0: %reg0
       - Be consistent when printing alignments: align=16
       - Print jump table contents.
       - Don't print host addresses, in general.
       - and various other cleanups.
      
      llvm-svn: 85682
      34341e69
  17. Oct 25, 2009
  18. Oct 07, 2009
  19. Oct 04, 2009
  20. Sep 23, 2009
    • Jakob Stoklund Olesen's avatar
      Fix verification of explicit operands. · 75b9c274
      Jakob Stoklund Olesen authored
      The machine code verifier did not check for explicit operands correctly. It
      used MachineInstr::getNumExplicitOperands, but that method may cheat and use
      the declared count in the TargetInstrDesc.
      
      Now we check the explicit operands one at a time in visitMachineOperand.
      
      llvm-svn: 82652
      75b9c274
  21. Sep 21, 2009
  22. Aug 27, 2009
  23. Aug 23, 2009
  24. Aug 13, 2009
  25. Aug 08, 2009
  26. Aug 04, 2009
    • Jakob Stoklund Olesen's avatar
      Enforce stricter rules in machine code verifier. · 3c2a1dea
      Jakob Stoklund Olesen authored
      Implicit operands no longer get a free pass: Imp-use requires a live register
      and imp-def requires a dead register.
      
      There is also no special rule allowing redefinition of a sub-register when the
      super-register is live. The super register must have imp-kill+imp-def operands
      instead.
      
      llvm-svn: 78090
      3c2a1dea
  27. Aug 02, 2009
  28. Jul 31, 2009
    • Dan Gohman's avatar
      Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage · 5ea74d55
      Dan Gohman authored
      shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
      don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
      and passes like MachineLoop are registered with isCFGOnly set to true.
      
      llvm-svn: 77691
      5ea74d55
    • Daniel Dunbar's avatar
      Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many · 54347565
      Daniel Dunbar authored
      failures when building assorted projects with clang.
      
      --- Reverse-merging r77654 into '.':
      U    include/llvm/CodeGen/Passes.h
      U    include/llvm/CodeGen/MachineFunctionPass.h
      U    include/llvm/CodeGen/MachineFunction.h
      U    include/llvm/CodeGen/LazyLiveness.h
      U    include/llvm/CodeGen/SelectionDAGISel.h
      D    include/llvm/CodeGen/MachineFunctionAnalysis.h
      U    include/llvm/Function.h
      U    lib/Target/CellSPU/SPUISelDAGToDAG.cpp
      U    lib/Target/PowerPC/PPCISelDAGToDAG.cpp
      U    lib/CodeGen/LLVMTargetMachine.cpp
      U    lib/CodeGen/MachineVerifier.cpp
      U    lib/CodeGen/MachineFunction.cpp
      U    lib/CodeGen/PrologEpilogInserter.cpp
      U    lib/CodeGen/MachineLoopInfo.cpp
      U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
      D    lib/CodeGen/MachineFunctionAnalysis.cpp
      D    lib/CodeGen/MachineFunctionPass.cpp
      U    lib/CodeGen/LiveVariables.cpp
      
      llvm-svn: 77661
      54347565
Loading