--- Reverse-merging r97592 into '.':
U    lib/CodeGen/TargetLoweringObjectFileImpl.cpp

llvm-svn: 97657

llvm-svn: 97656

and STRHT for disassembly only.

llvm-svn: 97655

llvm-svn: 97654

why the front-end is calculating the argument to llvm.eh.dwarf.cfa().

llvm-svn: 97653

Scope accelerator.

llvm-svn: 97652

entry we're about to process is obviously going to fail, don't
bother pushing a scope only to have it immediately be popped.
This avoids a lot of scope stack traffic in common cases.

Unfortunately, this requires duplicating some of the predicate
dispatch.  To avoid duplicating the actual logic I pulled each
predicate out to its own static function which gets used in
both places.

llvm-svn: 97651

to test clang_getCursorLinkage()

llvm-svn: 97648

llvm-svn: 97647

underlying linkage for the entity referred to by a
CXCursor.

llvm-svn: 97646

SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it.  This
speeds up selection, particularly for X86 which has lots of 
variants of instructions with only type differences.

llvm-svn: 97645

llvm-svn: 97644

llvm-svn: 97643

of loops.

llvm-svn: 97642

llvm-svn: 97641

that are hidden by other derived base subobjects reached along a
lookup path that does *not* pass through the hiding subobject (C++
[class.member.lookup]p6). Fixes PR6462.

llvm-svn: 97640

llvm-svn: 97639

__builtin_frob_return_address.  The implementations for both are
still trivial in the default case.

llvm-svn: 97638

for the base destructor, because aliases to declarations aren't legal.

Fixes PR 6471.

llvm-svn: 97637

llvm-svn: 97635

level. No functionality change, and it obeys access control this
time.

llvm-svn: 97634

better done by dag combine.

llvm-svn: 97633

for disassembly only.

llvm-svn: 97632

llvm-svn: 97631

'dsload' pattern.  tblgen doesn't check patterns to see if they're
textually identical.  This allows better factoring.

llvm-svn: 97630

that they are not destination type specific.  This allows
tblgen to factor them and the type check is redundant with
what the isel does anyway.

llvm-svn: 97629

- Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).

llvm-svn: 97628

llvm-svn: 97627

llvm-svn: 97626

llvm-svn: 97625

If an initializer in a DeclStmt references the declared variable, that
extends the liveness of that variable.

llvm-svn: 97624

llvm-svn: 97623

llvm-svn: 97621

(even if it is defined).  This fixes the issue of this function
returning '0' when SVN_VERSION is defined to be "".

Fixes: <rdar://problem/7663667>
llvm-svn: 97620

llvm-svn: 97619

static function. No functionality change.

llvm-svn: 97618

llvm-svn: 97617

long test(long x) { return (x & 123124) | 3; }

Currently compiles to:

_test:
        orl     $3, %edi
        movq    %rdi, %rax
        andq    $123127, %rax
        ret

This is because instruction and DAG combiners canonicalize

  (or (and x, C), D) -> (and (or, D), (C | D))

However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.

llvm-svn: 97616

llvm-svn: 97615

disassembly only.

llvm-svn: 97614