for ELF to work.  
2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0, 
IndexReg=0.
3) The JIT can get the real address of cstpools and jmptables during
code emission, fix that for object code emission

llvm-svn: 78129

still get "intel syntax" instructions from llc with  
-x86-asm-syntax=intel

llvm-svn: 78103

the masm backend.  If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.

llvm-svn: 78096

add new concrete versions for 1/2/4-byte mergable strings.

These are not actually created yet.

llvm-svn: 78055

llvm-svn: 78006

more step towards "semantics sections"

llvm-svn: 78002

code that I will be using shortly.

llvm-svn: 77983

llvm-svn: 77978

This will cause it to enter the ".text" section instead of "_text"
but masm is already broken.

llvm-svn: 77977

Since we're generating stubs by hands we don't follow the ABI and don't
create a register spill area.
Don't use this area in compilation callback!

llvm-svn: 77968

llvm-svn: 77966

llvm-svn: 77965

Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64).

llvm-svn: 77964

Cleanup Darwin MMX calling conv stuff - make the stuff more generic. This also fixes a subtle bug, when 6th v1i64 argument passed wrongly.

llvm-svn: 77963

Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.

llvm-svn: 77962

llvm-svn: 77956

llvm-svn: 77944

Thanks to Eli Friedman for noticing it.

llvm-svn: 77942

Fixes PR4669

llvm-svn: 77940

- Tidy up some headers.

llvm-svn: 77929

 - The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927

pushes in the function prolog if the function doesn't have any stack space,
i.e. for a prolog like:

0x40011870:     push %r15
0x40011872:     push %r14
0x40011874:     push %rbx

Patch by Zoltan!

llvm-svn: 77919

Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918

llvm-svn: 77895

llvm-svn: 77894

llvm-svn: 77893

TLOF, unifying all the dwarf targets at the same time.

llvm-svn: 77889

llvm-svn: 77888

the only real caller (GetFunctionSizeInBytes) uses it.

The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain.  It should be removed 
IMNSHO, but I'll leave that to ARMish folks to decide.

llvm-svn: 77877

defaults to being ELF.

llvm-svn: 77866

no longer depends on TM!

llvm-svn: 77863

llvm-svn: 77861

even considering #if 0 code.

llvm-svn: 77856

getLSDASection() to be more specific.  This makes it pretty obvious
that the ELF LSDA section is being specified wrong in PIC mode.  We're
probably getting a lot of startup-time relocations to a readonly page,
which is expensive and bad.

Someone who cares about ELF C++ should investigate this.

llvm-svn: 77847

operands.

llvm-svn: 77837

compute it based on what it knows.  As part of this, rename getSectionForMergeableConstant
to getSectionForConstant because it works for non-mergable constants also.

The only functionality change from this is that Xcore will start dropping
its jump tables into readonly section instead of data section in -static mode.
This should be fine as the linker resolves the relocations.  If this is a
problem, let me know and we'll come up with another solution.

llvm-svn: 77833

llvm-svn: 77820

llvm-svn: 77806

llvm-svn: 77795

llvm-svn: 77768