Commits · 1b1e25b7c51a4f021050cd693f77dc9d4a84740f · Roger Ferrer / llvm-epi-0.8 · GitLab

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Sep 27, 2013
- [mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal... · 1b1e25b7
  Daniel Sanders authored Sep 27, 2013
  1b1e25b7
- [mips][msa] Expand all truncstores and loadexts for MSA as well as DSP · 36c671e2
  Daniel Sanders authored Sep 27, 2013
  36c671e2
- [mips][msa] Added missing check in performSRACombine · f4f1a872
  Daniel Sanders authored Sep 27, 2013
  f4f1a872
- Put HasAVX512 predicate on some patterns to properly disable them when AVX512... · dbe8b7d2
  Craig Topper authored Sep 27, 2013
  dbe8b7d2
- Switch HasAVX to UseAVX in one spot to ensure that AVX512 form of VINSERTPS is used in AVX512 mode. · 8f14de8f
  Craig Topper authored Sep 27, 2013
  8f14de8f
- Removal some duplicate patterns. · c6a1aac7
  Craig Topper authored Sep 27, 2013
  c6a1aac7
- Fixing Intel format of the vshufpd instruction. · 4467f33e
  Yunzhong Gao authored Sep 27, 2013
  4467f33e
Sep 26, 2013
- [mips][msa] Direct Object Emission for 3RF instructions. · cb8b40b0
  Jack Carter authored Sep 26, 2013
  cb8b40b0
- [mips][msa] Updates encoding of 3RF instructions to match the latest revision... · 142ec828
  Jack Carter authored Sep 26, 2013
  142ec828
- Fix PR 17372: Emitting PLD for stack address for ARM Thumb2 · 286304a3
  Weiming Zhao authored Sep 26, 2013
  286304a3
- [PowerPC] Fix PR17354: Generate nop after local calls for PIC code. · cea15962
  Bill Schmidt authored Sep 26, 2013
  cea15962
- [Sparc] Implements exception handling in SPARC with DwarfCFI. · 4c0cdd73
  Venkatraman Govindaraju authored Sep 26, 2013
  4c0cdd73
- [ARM] Use the load-acquire/store-release instructions optimally in AArch32. · b4ad2f39
  Amara Emerson authored Sep 26, 2013
  b4ad2f39
- PPC: Allow partial fills in writeNopData() · 7137420d
  David Majnemer authored Sep 26, 2013
  7137420d
- Added temp flag -misched-bench for staging in default changes. · 71e8bb6d
  Andrew Trick authored Sep 26, 2013
  71e8bb6d
- PPC: Do not introduce ISD nodes for fctid and fctiw · 08249a31
  David Majnemer authored Sep 26, 2013
  08249a31
- PPC: Add support for fctid and fctiw · 6ad26d33
  David Majnemer authored Sep 26, 2013
  6ad26d33
- [mips][msa] Direct Object Emission for 3R instructions. · 3eb663b0
  Jack Carter authored Sep 26, 2013
  3eb663b0
- [mips][msa] Updates encoding of 3R instructions to match the latest revision... · 77551abe
  Jack Carter authored Sep 26, 2013
  77551abe
- [mips][msa] Direct Object Emission for 2RF instructions. · 33812982
  Jack Carter authored Sep 25, 2013
  33812982
- [mips][msa] Direct Object Emission support for the MSA instruction set. · 5dc8ac92
  Jack Carter authored Sep 25, 2013
  5dc8ac92
- [mips][msa] Updates encoding of 2RF instructions to match the latest revision... · 56c681eb
  Jack Carter authored Sep 25, 2013
  56c681eb
- Fix PR 17368: disable vector mul distribution for square of add/sub for ARM · 2052f484
  Weiming Zhao authored Sep 25, 2013
  2052f484
Sep 25, 2013
- Fix a bad typo in the inline assembly code for mips16 pic fp stubs · a6ce797f
  Reed Kotler authored Sep 25, 2013
  a6ce797f
- Mark the x86 machine model as incomplete. PR17367. · b6854d80
  Andrew Trick authored Sep 25, 2013
  b6854d80
- [SystemZ] Define the GR64 low-word logic instructions as pseudo aliases. · 652784e2
  Richard Sandiford authored Sep 25, 2013
  652784e2
- MC: Add support for treating $ as a reference to the PC · 0c58bc64
  David Majnemer authored Sep 25, 2013
  0c58bc64
- [SystemZ] Define the call instructions as pseudo aliases. · f348f831
  Richard Sandiford authored Sep 25, 2013
  f348f831
- [SystemZ] Use subregs for 64-bit truncating stores · 6cbd7f0c
  Richard Sandiford authored Sep 25, 2013
  6cbd7f0c
- [SystemZ] Define the return instruction as a pseudo alias of BR · 9ab97cd1
  Richard Sandiford authored Sep 25, 2013
  9ab97cd1
- [SystemZ] Add instruction-shortening pass · 35ec4e35
  Richard Sandiford authored Sep 25, 2013
  35ec4e35
- MC: Remove vestigial PCSymbol field from AsmInfo · 1ccd2f2a
  David Majnemer authored Sep 25, 2013
  1ccd2f2a
- Revert r191350. · 7d92b346
  Akira Hatanaka authored Sep 25, 2013
  7d92b346
- [mips] Move public functions to the beginning of the class definition. · f215e077
  Akira Hatanaka authored Sep 25, 2013
  f215e077
- [mips] Define getTargetNode as a template function. · 30f97cfa
  Akira Hatanaka authored Sep 25, 2013
  30f97cfa
- CriticalAntiDepBreaker is no longer needed for armv7 scheduling. · d24698c8
  Andrew Trick authored Sep 25, 2013
  d24698c8
Sep 24, 2013
- Adding a feature flag to the llvm backend for x86 TBM instruction set. · dd36e938
  Yunzhong Gao authored Sep 24, 2013
  dd36e938
- [mips][msa] Added support for matching pckev, and pckod from normal IR (i.e. not intrinsics) · fae5f2a9
  Daniel Sanders authored Sep 24, 2013
  fae5f2a9
- [mips][msa] Added support for matching ilv[lr], ilvod, and ilvev from normal... · 2ed228b2
  Daniel Sanders authored Sep 24, 2013
  2ed228b2
- [mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics) · 2630718a
  Daniel Sanders authored Sep 24, 2013
  2630718a