and use it in one place in inline asm handling stuff.  Before
we'd generate this for an invalid modifier letter:

$ clang asm.c -c -o t.o
fatal error: error in backend: Invalid operand found in inline asm: 'abc incl    ${0:Z}'
INLINEASM <es:abc incl    ${0:Z}>, 10, %EAX<def>, 2147483657, %EAX, 14, %EFLAGS<earlyclobber,def,dead>, <!-1>


Now we generate this:

$ clang asm.c -c -o t.o
error: invalid operand in inline asm: 'incl    ${0:Z}'
asm.c:3:12: note: generated from here
  __asm__ ("incl    %Z0" : "+r" (X));
           ^
1 error generated.

This is much better but still admittedly not great ("why" is the operand 
invalid??), codegen should try harder with its diagnostics :)

llvm-svn: 100723

isNotEmpty calls.

llvm-svn: 100722

llvm-svn: 100720

llvm-svn: 100719

llvm-svn: 100718

and friends.

llvm-svn: 100717

code won't actually get used yet because we don't handle non-type
parameter packs, but when we do, this code should jump in and work.

llvm-svn: 100716

llvm-svn: 100714

llvm-svn: 100713

llvm-svn: 100711

llvm-svn: 100710

llvm-svn: 100709

llvm-svn: 100708

llvm-svn: 100707

llvm-svn: 100706

llvm-svn: 100705

llvm-svn: 100704

llvm-svn: 100703

llvm-svn: 100702

llvm-svn: 100700

explicitly split into stride-and-offset pairs. Also, add the
ability to track multiple post-increment loops on the same expression.

This refines the concept of "normalizing" SCEV expressions used for
to post-increment uses, and introduces a dedicated utility routine for
normalizing and denormalizing expressions.

This fixes the expansion of expressions which are post-increment users
of more than one loop at a time. More broadly, this takes LSR another
step closer to being able to reason about more than one loop at a time.

llvm-svn: 100699

llvm-svn: 100697

llvm-svn: 100696

Next to work on is ARMDisassemblerCore.cpp.

llvm-svn: 100695

argument that had to be between 0 and 7 to have any value,
firing an assert later in the AsmPrinter.  Now, the
disassembler rejects instructions with out-of-range values
for that immediate.

llvm-svn: 100694

llvm-svn: 100693

llvm-svn: 100692

llvm-svn: 100691

ARMDecoderEmitter.cpp, with FIXME comment.

llvm-svn: 100690

emitting diagnostics after it has produced that many errors.  Give this a
default value of 20 which produces plenty of errors for people to fix before
recompiling but not so many that their entire console scrolls away when the
compiler gets confused.  The experience looks like this:

$ clang foo.c
<tons of crap>
foo.c:102:3: error: unknown type name 'somethingbad'
  somethingbad x;
  ^
fatal error: too many errors emitted, stopping now
36 warnings and 20 errors generated.

llvm-svn: 100689

those who don't build all targets.

llvm-svn: 100688

llvm-svn: 100687

isn't any extra work to perform. Also, don't check for unused
parameters when the warnings will be suppressed anyway. Improves
performance of -fsyntax-only on 403.gcc's combine.c by ~2.5%. 
<rdar://problem/7836787>

llvm-svn: 100686

a simple mapping of register names to IDs to
identify register tokens.

llvm-svn: 100685

Right now the limit is 0 (aka disabled)

llvm-svn: 100684

llvm-svn: 100682

DBG_VALUE does not generate code.

llvm-svn: 100681

llvm-svn: 100677

or similar side-effects.

llvm-svn: 100676

of errors and warnings.  This allows us to emit something like this:

2 warnings and 1 error generated.

instead of:

3 diagnostics generated.

This also stops counting 'notes' because they are just follow-on information
about the previous diag, not a diagnostic in themselves.

llvm-svn: 100675