<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code.  The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing.  This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)

llvm-svn: 52750

string output routine from Constant. Update all
callers. Change debug intrinsic api slightly to
accomodate move of routine, these now return values
instead of strings.

llvm-svn: 52748

change it to sint_to_fp on targets where that is cheaper (and
visaversa of course).  This allows us to compile uint_to_fp to:

_test:
	movl	4(%esp), %eax
	shrl	$23, %eax
	cvtsi2ss	%eax, %xmm0
	movl	8(%esp), %eax
	movss	%xmm0, (%eax)
	ret

instead of:

	.align	3
LCPI1_0:					##  double
	.long	0	## double least significant word 4.5036e+15
	.long	1127219200	## double most significant word 4.5036e+15
	.text
	.align	4,0x90
	.globl	_test
_test:
	subl	$12, %esp
	movl	16(%esp), %eax
	shrl	$23, %eax
	movl	%eax, (%esp)
	movl	$1127219200, 4(%esp)
	movsd	(%esp), %xmm0
	subsd	LCPI1_0, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movl	20(%esp), %eax
	movss	%xmm0, (%eax)
	addl	$12, %esp
	ret

llvm-svn: 52747

Remember which MachineOperand we were processing, so we don't have to scan the list to find it again later.
This speeds up live intervals from 0.37s to 0.30s on instcombine.

llvm-svn: 52745

llvm-svn: 52744

  shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.

llvm-svn: 52740

For this it is convenient to permit floats to
be used with EXTRACT_ELEMENT, so I tweaked
things to allow that.  I also added libcalls
for ppcf128 to i32 forms of FP_TO_XINT, since
they exist in libgcc and this case can certainly
occur (and does occur in the testsuite) - before
the i64 libcall was being used.  Also, the
XINT_TO_FP result seemed to be wrong when
the argument is an i128: the wrong fudge
factor was added (the i32 and i64 cases were
handled directly, but the i128 code fell
through to some generic softening code which
seemed to think it was i64 to f32!).  So I
fixed it by adding a fudge factor that I
found in my breakfast cereal.

llvm-svn: 52739

select_cc and friends.  This code could be
factorized a bit but I'm not sure that it's
worth it.

llvm-svn: 52724

the base SDNode's VTList.

llvm-svn: 52722

Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub

llvm-svn: 52706

llvm-svn: 52701

llvm-svn: 52689

as a questionable case, but the code isn't actually needed.

llvm-svn: 52657

    ,------.
    |      |
    |      v
    |   t2 = phi ... t1 ...
    |      |
    |      v
    |   t1 = ...
    |  ... = ... t1 ...
    |      |
    `------'

where there is a use in a PHI node that's a predecessor to the defining
block. We don't want to mark all predecessors as having the value "alive" in
this case. Also, the assert was too restrictive and didn't handle this case.

llvm-svn: 52655

needs arbitrary-element removal.

llvm-svn: 52654

Use getMBBEndIdx rather than assuming that the end is right after the last instruction in the block.

llvm-svn: 52649

Remove option used to debug stack coloring bugs. It's no longer needed since stack coloring is now bug free.

llvm-svn: 52644

clear() on each iteration. This avoids allocating and deallocating
all of DenseMap's memory on each iteration.

llvm-svn: 52642

Instead of adding an isSS field to LiveInterval to denote stack slot. Use top bit of 'reg' instead. If the top bit is set, than the LiveInterval represents a stack slot live interval.

llvm-svn: 52639

llvm-svn: 52624

Bail out with an error if there is no libcall available
for the given size of integer.

llvm-svn: 52622

llvm-svn: 52621

stores.

llvm-svn: 52620

fixes PR2476; patch by Richard Osborne.  The same
problem exists for a bunch of other operators, but
I'm ignoring this because they will be automagically
fixed when the new LegalizeTypes infrastructure lands,
since it already solves this problem centrally.

llvm-svn: 52610

llvm-svn: 52604

check this with an assert.

llvm-svn: 52603

llvm-svn: 52601

llvm-svn: 52600

llvm-svn: 52585

field, which is otherwise unused after instruction selection, as an index
into the SUnit array.

llvm-svn: 52583

and provides fairly efficient removal of arbitrary elements. Switch
ScheduleDAGRRList from std::set to this new priority queue.

llvm-svn: 52582

don't know if a truncating store is possible here,
but added support for it anyway.

llvm-svn: 52577

to DenseMap<SDNode*, SUnit*>, and adjust the way cloned SUnit nodes are
handled so that only the original node needs to be in the map.
This speeds up llc on 447.dealII.llvm.bc by about 2%.

llvm-svn: 52576

llvm-svn: 52572

llvm-svn: 52571

Enhanced heuristic to determine the *best* register to spill. Instead of picking the register with the lowest spill weight. Consider (up to) 2 additional registers with spill weights that are close to the lowest spill weight. The one with fewest defs and uses that conflicts with the current interval (weighted by loop depth) is the spill candidate.

This is not always a win, but there are much more wins than loses and wins tend to be more noticeable.

llvm-svn: 52554

float expansion (and sometimes vector splitting too).

llvm-svn: 52548

integer of the same type.  Before it was "promotion",
but this is confusing because it is quite different
to promotion of integers.  Call it "softening" instead,
inspired by "soft float".

llvm-svn: 52546

llvm-svn: 52545

llvm-svn: 52522