llvm-svn: 140947

llvm-svn: 140946

llvm-svn: 140943

llvm-svn: 140942

llvm-svn: 140941

llvm-svn: 140940

llvm-svn: 140939

Add an ARMConstantPool class for external symbols. This will split out the support for external symbols from the base class.

llvm-svn: 140938

llvm-svn: 140937

and block addresses.

llvm-svn: 140936

* Add a couple of Create methods to the ARMConstantPoolConstant class,
* Add its own version of getExistingMachineCPValue, and
* Modify hasSameValue to return false if the object isn't an ARMConstantPoolConstant.

llvm-svn: 140935

llvm-svn: 140934

pool value.

It's not used right now, but will be soon.

llvm-svn: 140933

useful if an optimization assumes the stack has been realigned.  Credit to
Eli for his assistance.
rdar://10043857

llvm-svn: 140924

We want heuristics to be based on accurate data, but more importantly
we don't want llvm to behave randomly. A benign trunc inserted by an
upstream pass should not cause a wild swings in optimization
level. See PR11034. It's a general problem with threshold-based
heuristics, but we can make it less bad.

llvm-svn: 140919

llvm-svn: 140916

llvm-svn: 140906

and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.

For instance, in file A.c:

   struct S s;

In file B.c:
   struct {
     // something long
   };
   extern S s;

   void foo() {
     struct S p = s;
     // ...
   }

this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.

llvm-svn: 140902

llvm-svn: 140899

This uses less memory and it reduces the complexity of sub-class
operations:

- hasSubClassEq() and friends become O(1) instead of O(N).

- getCommonSubClass() becomes O(N) instead of O(N^2).

In the future, TableGen will infer register classes.  This makes it
cheap to add them.

llvm-svn: 140898

It will soon need the context.

llvm-svn: 140896

llvm-svn: 140892

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140891

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140887

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140886

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140885

llvm-svn: 140879

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140878

llvm-svn: 140875

llvm-svn: 140874

llvm-svn: 140873

llvm-svn: 140870

InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.

We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
  %conv = fpext float %x to double
  %cmp = fcmp olt double %conv, 0.000000e+00
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}

Into:
define float @bar(float %x) nounwind readnone optsize ssp {
  %cmp = fcmp olt float %x, 0.000000e+00   ; <---- This
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}


rdar://10215914

llvm-svn: 140869

llvm-svn: 140868

llvm-svn: 140865

This matches clang, so default options in llc and friends are now closer to
clang's defaults.

llvm-svn: 140863

llvm-svn: 140862

Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509

llvm-svn: 140861

Thanks to Alexandru Dura and Jonas Paulsson for finding it.

llvm-svn: 140859

llvm-svn: 140856