Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344.

llvm-svn: 140971

r140966.

llvm-svn: 140969

llvm-svn: 140955

Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702.

llvm-svn: 140954

llvm-svn: 140904

llvm-svn: 140903

and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.

For instance, in file A.c:

   struct S s;

In file B.c:
   struct {
     // something long
   };
   extern S s;

   void foo() {
     struct S p = s;
     // ...
   }

this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.

llvm-svn: 140902

Test of indexing lists of lists of lists works.  This also exercises
some operators.

llvm-svn: 140884

Add a TableGen test to check if indexing lists of lists works.

llvm-svn: 140883

llvm-svn: 140872

llvm-svn: 140870

InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.

We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
  %conv = fpext float %x to double
  %cmp = fcmp olt double %conv, 0.000000e+00
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}

Into:
define float @bar(float %x) nounwind readnone optsize ssp {
  %cmp = fcmp olt float %x, 0.000000e+00   ; <---- This
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}


rdar://10215914

llvm-svn: 140869

This matches clang, so default options in llc and friends are now closer to
clang's defaults.

llvm-svn: 140863

llvm-svn: 140860

is a catch-all landingpad clause.

llvm-svn: 140858

catch or repeated filter clauses.  Teach instcombine a bunch
of tricks for simplifying landingpad clauses.  Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function.  Probably
someone should add the ObjC++ personality function.  I didn't as
I don't know anything about it.

llvm-svn: 140852

llvm-svn: 140841

immediate.

llvm-svn: 140839

slot filler.

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140825

handle the case where the retain is in a different basic block.
rdar://10210274.

llvm-svn: 140815

objc_retainBlock call is potentially responsible for copying
the block to the heap to extend its lifetime. rdar://10209613.

llvm-svn: 140814

llvm-svn: 140806

Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.

llvm-svn: 140762

llvm-svn: 140761

llvm-svn: 140753

ends up introducing a cycle in the DAG.

rdar://10196296

llvm-svn: 140733

llvm-svn: 140723

Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

llvm-svn: 140697

Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.

llvm-svn: 140696

llvm-svn: 140671

PR10628: Fix getModRefInfo so it queries the underlying alias() implementation correctly while checking nocapture calls.

llvm-svn: 140666

This also enables domain swizzling for AVX code which required a few
trivial test changes.

The pass will be moved to lib/CodeGen shortly.

llvm-svn: 140659

Add inst alias to handle these assembly forms. Add tests, too.

rdar://10178799

llvm-svn: 140647

test/CMakeLists.txt: Depend on llvm-objdump. "make check" is expected to resolve test-dependent targets on CMake build.

llvm-svn: 140641

Stop emitting instructions with the name "tmp" they eat up memory and have to be uniqued, without any benefit.

If someone prefers %tmp42 to %42, run instnamer.

llvm-svn: 140634

llvm-svn: 140627

llvm-svn: 140622

llvm-svn: 140593

split landingpad instructions into a PHI node.
PR11016

llvm-svn: 140592

llvm-svn: 140585