chaining and simplify FunctionAttrs' GetModRefBehavior logic.

llvm-svn: 118660

llvm-svn: 118656

llvm-svn: 118653

llvm-svn: 118652

earlier. Implicit bool -> int conversions are evil!

llvm-svn: 118651

llvm-svn: 118648

llvm-svn: 118645

llvm-svn: 118644

as derived from the target triple.  This is important for enabling
features that are implied based on the architecture version.

llvm-svn: 118643

It is only supported for ARM code.  Normally Thumb2 code would use DMB instead,
but depending on how the compiler is invoked (e.g., -mattr=-db) that might be
disabled.  This prevents a "cannot select MEMBARRIER_MCR" error in that
situation.  Radar 8644195

llvm-svn: 118642

* LDM, et al, uses a bit mask to indicate the register list.
* VLDM, et al, uses a base register plus number.

The LDM instructions may be non-contiguous, but the VLDM ones must be
contiguous. Those are semantic checks that should be done later in the
compiler. Also postpone the creation of the bit mask until it's needed.

llvm-svn: 118640

llvm-svn: 118639

help in MC'izing the references that use them.

llvm-svn: 118633

(retry now that the windows build is green)

llvm-svn: 118630

llvm-svn: 118628

llvm-svn: 118627

memory. This isn't a real improvement with present day AliasAnalysis
implementations; it's mainly for consistency.

llvm-svn: 118624

llvm-svn: 118623

llvm-svn: 118622

llvm-svn: 118621

llvm-svn: 118618

llvm-svn: 118617

-Wnon-virtual-dtor.

llvm-svn: 118616

llvm-svn: 118615

property IntrReadArgMem can be modeled.

llvm-svn: 118614

llvm-svn: 118613

llvm-svn: 118611

llvm-svn: 118610

pseudo-label. (TLS stuff).

llvm-svn: 118609

llvm-svn: 118608

llvm-svn: 118606

llvm-svn: 118604

object file emission.

llvm-svn: 118601

llvm-svn: 118600

llvm-svn: 118589

Really fix the leak in the attributes list.  Thanks to Benjamin Kramer for pointing out how I was being stupid.

llvm-svn: 118588

a left shift by zero.

llvm-svn: 118587

llvm-svn: 118586

llvm-svn: 118516

llvm-svn: 118515