efficient implementation possible, but it's pretty simple and
good enough for the time being.

llvm-svn: 56504

llvm-svn: 56502

llvm-svn: 56501

track of the number of live registers, which is all the set was
being used for.

llvm-svn: 56498

instruction opcodes are now numbered. No functionality change.

llvm-svn: 56497

llvm-svn: 56495

X86ISelDAGToDAG.cpp and into X86InstrInfo.cpp. This will allow
it to be reused by FastISel.

llvm-svn: 56494

    -callgraph => print-callgraph
    -callscc   => print-callgraph-sccs
    -cfgscc    => print-cfg-sccs
    -externalfnconstants => print-externalfnconstants
    -print               => print-function
    -print-alias-sets (no change)
    -print-callgraph     => dot-callgraph
    -print-cfg           => dot-cfg
    -print-cfg-only      => dot-cfg-only
    -print-dom-info (no change)
    -printm              => print-module
    -printusedtypes      => print-used-types

llvm-svn: 56487

llvm-svn: 56486

llvm-svn: 56485

llvm-svn: 56483

load address has an offset from the base of the constant pool
entry.

llvm-svn: 56479

llvm-svn: 56477

llvm-svn: 56476

llvm-svn: 56475

just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.

llvm-svn: 56472

default.

llvm-svn: 56471

llvm-svn: 56469

llvm-svn: 56468

llvm-svn: 56456

llvm-svn: 56453

(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452

Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.

llvm-svn: 56436

llvm-svn: 56419

llvm-svn: 56418

sarl    $3, %ecx

instead of:

movl    $3, %ecx
sarl    %cl, %edx

This shrinks fast isel 176.gcc by about 2000 instructions (.3%)

llvm-svn: 56413

Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.

llvm-svn: 56412

compute the maximum element directly.

llvm-svn: 56411

correct in the presence of things like EH labels.

llvm-svn: 56410

llvm-svn: 56399

llvm-svn: 56391

of mayReadFromMemory and mayWriteToMemory.

llvm-svn: 56387

Check bits for preferred register.

llvm-svn: 56384

Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.

llvm-svn: 56381

llvm-svn: 56378

llvm-svn: 56377

llvm-svn: 56376

llvm-svn: 56372

results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371

have previously been assigned conflicting physreg.

llvm-svn: 56364