Use the new instruction deprecation feature to mark mftb (now replaced with
mfspr) and dst (along with the other Altivec cache control instructions) as
deprecated when targeting cores supporting at least ISA v2.03.

llvm-svn: 190605

undef constatnt for structure and test for these functions.

done by Yuri Veselov (mailto:Yuri.Veselov@intel.com)

llvm-svn: 190599

The 'Deprecated' class allows you to specify a SubtargetFeature that the
instruction is deprecated on.

The 'ComplexDeprecationPredicate' class allows you to define a custom
predicate that is called to check for deprecation.
For example:
  ComplexDeprecationPredicate<"MCR">

would mean you would have to define the following function:
  bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
                             std::string &Info)

Which returns 'false' for not deprecated, and 'true' for deprecated
and store the warning message in 'Info'.

The MCTargetAsmParser constructor was chaned to take an extra argument of
the MCInstrInfo class, so out-of-tree targets will need to be changed.

llvm-svn: 190598

Added parsing of mask register and "zeroing" semantic, like {%k1} {z}.

llvm-svn: 190595

Aggressive anti-dependency breaking is enabled by default for all PPC cores.
This provides a general speedup on the P7 and other platforms (among other
factors, the instruction group formation for the non-embedded PPC cores is done
during post-RA scheduling). In order to do this safely, the incompatibility
between uses of the MFOCRF instruction and anti-dependency breaking are
resolved by marking MFOCRF with hasExtraSrcRegAllocReq. As noted in the removed
FIXME, the problem was that MFOCRF's output is sensitive to the identify of the
source register, and always paired with a shift to undo this effect. Because
anti-dependency breaking is unaware of this hidden dependency of the shift
amount on the source register of the MFOCRF instruction, changing that register
must be inhibited.

Two test cases were adjusted: The SjLj test was made more insensitive to
register choices and scheduling; the saveCR test disabled anti-dependency
breaking because part of what it is testing is proper register reuse.

llvm-svn: 190587

If no register classes are added to CriticalPathRCs, then the CriticalPathSet
bitmask will be empty. In that case, ExcludeRegs must remain NULL or else this
line will cause a segfault:

  } else if ((ExcludeRegs != NULL) && ExcludeRegs->test(AntiDepReg)) {

I have no in-tree test case.

llvm-svn: 190584

For _XYZ, the type of VDATA is v4i32, because v3i32 doesn't exist.

The ADDR64 bit is not exposed. A simpler intrinsic that doesn't take
a resource descriptor might be nicer.

The maximum number of input SGPRs is bumped to 17.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 190575

This fixes some regressions in the piglit local memory store tests
introduced by recent commits which made the scheduler aware of the trans
slot.

It's not possible to test this using lit, because there is no way to
determine from the assembly dumps whether or not an instruction is in
the trans slot.

Even if this were possible, the test would be highly sensitive to
changes in the scheduler and might generate confusing false negatives.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 190574

llvm-svn: 190567

llvm-svn: 190565

As Andy pointed out to me a long time ago, there are no structural hazards in
the later pipeline stages of the A2, and so modeling them is useless. Also,
modeling the top pre-dispatch stages is deceiving because, when multiple
hardware threads are active, those resources are shared among the threads. The
bypass definitions were mostly wrong, and so those have been removed. The
resulting itinerary is much simpler, and more accurate.

llvm-svn: 190562

For embedded PPC cores (especially the A2 core), using the MI scheduler with AA
is far superior to the other scheduling options.

llvm-svn: 190558

llvm-svn: 190551

The PowerPC A2 core greatly benefits from aggressive concatenation unrolling;
use the new getUnrollingPreferences to enable this by default when targeting
the PPC A2 core.

llvm-svn: 190549

llvm-svn: 190547

llvm-svn: 190544

Allow targets to customize the default behavior of the generic loop unrolling
transformation. This will be used by the PowerPC backend when targeting the A2
core (which is in-order with a deep pipeline), and using more aggressive
defaults is important.

llvm-svn: 190542

Definition of DIRef used to require the full definition of DIType because
of usage of DIType::isType in DIRef::resolve. We now use DIDescriptor::isType
instead to remove the requirement and move definition of DIRef before DIType.

With this, we can move the definition of DIType::getContext to the header
file.

llvm-svn: 190540

It works with clang, but GCC has different rules so we can't make all of those
hidden. This reverts commit r190534.

llvm-svn: 190536

Worth 100k on a linux/x86_64 Release+Asserts clang.

llvm-svn: 190534

+ formatting fixes.

llvm-svn: 190523

[mips][msa] Added support for matching mulv, nlzc, sll, sra, srl, and subv from normal IR (i.e. not intrinsics)

llvm-svn: 190518

[mips][msa] Added support for matching fadd, fdiv, flog2, fmul, frint, fsqrt, and fsub from normal IR (i.e. not intrinsics)

llvm-svn: 190512

This reflects the common use case of nativizing a prepared path. The existing
version invokes undefined behavior if input = output, add an assert to catch
that case.

llvm-svn: 190510

llvm-svn: 190509

The corresponding intrinsic is now lowered into equivalent IR (ISD::ADD) before instruction selection.

llvm-svn: 190507

No functional change

llvm-svn: 190506

The elements of the operands should be half the width of the elements of
the result.

llvm-svn: 190505

llvm-svn: 190499

This doesn't change anything since malloc always returns
address space 0.

llvm-svn: 190498

llvm-svn: 190491

llvm-svn: 190490

llvm-svn: 190485

It was turning the buildbots red.

llvm-svn: 190480

llvm-svn: 190472

YAMLIO printed a string as is without quotes unless it contains a newline
character. That did not suffice. We also need to quote a string if it starts
with a backquote, quote, double quote or atsign, or it's the empty string.

llvm-svn: 190469

No functional change.

llvm-svn: 190466

llvm-svn: 190461

In some cases (e.g. when a build system pipes stderr) the Windows console
API cannot be used to color output. For these, provide a way to switch to
ANSI escape codes. This is required for Clang's -fansi-escape-codes option.

llvm-svn: 190460

llvm-svn: 190450