- May 20, 2010
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Dan Gohman authored
instructions. llvm-svn: 104231
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Dan Gohman authored
16-bit and 32-bit pushf and popf. llvm-svn: 104228
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Dan Gohman authored
llvm-svn: 104204
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Dan Gohman authored
doesn't have a register operand. Also, use I instead of PSI, for consistency with mfence and lfence. llvm-svn: 104203
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- May 19, 2010
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Evan Cheng authored
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace. llvm-svn: 104147
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Daniel Dunbar authored
llvm-svn: 104122
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Daniel Dunbar authored
prefix byte problem as in r104062. - As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction. llvm-svn: 104120
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Daniel Dunbar authored
CALL64pcrel32, for the same reason. llvm-svn: 104116
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Evan Cheng authored
t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM. llvm-svn: 104115
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Evan Cheng authored
llvm-svn: 104114
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Daniel Dunbar authored
llvm-svn: 104112
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Evan Cheng authored
Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These do not have other un-modeled side effects. llvm-svn: 104111
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Evan Cheng authored
llvm-svn: 104110
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Daniel Dunbar authored
avoid same prefix byte problem as in r104062. llvm-svn: 104108
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Evan Cheng authored
Mark a few more pattern-less instructions with neverHasSideEffects. This is especially important on instructions like t2LEApcreal which are prime candidate for machine LICM. llvm-svn: 104102
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Dan Gohman authored
opcodes into a helper function. This fixes a few places in the code which were not properly selecting the 8-bit-immediate opcodes. llvm-svn: 104091
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- May 18, 2010
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Dan Gohman authored
llvm-svn: 104068
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Bill Wendling authored
specified. llvm-svn: 104066
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Dan Gohman authored
8-bit immediate field rather than one with a wider immediate field. llvm-svn: 104064
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Chris Lattner authored
The register use operands (e.g. the first argument is passed in a register) is currently being modeled as a normal register use, instead of correctly being an implicit use. This causes the operand to get propagated onto the mcinst, which was causing the encoder to emit a rex prefix byte, which generates an invalid call. This fixes rdar://7998435 llvm-svn: 104062
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Evan Cheng authored
Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 llvm-svn: 104060
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Daniel Dunbar authored
X86::ADC32ri $0, %eax to X86::ADC32i32 $0 llvm-svn: 104030
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Jakob Stoklund Olesen authored
too large limit. The function would return immediately when finding an addrmode 3/5 instruction. It needs to keep scanning in case there is an addrmode 6 instruction which drops the limit to 0. A test case is very difficult to produce because it will only fail when the scavenger is used. rdar://problem/7894847 llvm-svn: 103995
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Bill Wendling authored
- Change the logic DisableFramePointerElim() to check for the -disable-non-leaf-fp-elim before -disable-fp-elim. llvm-svn: 103990
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- May 17, 2010
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Evan Cheng authored
llvm-svn: 103982
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Daniel Dunbar authored
- Of questionable utility, since in general anything which wants to do this should probably be within a target specific hook, which can rely on the sections being of the appropriate type. However, it can be useful for short term hacks. llvm-svn: 103980
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Eric Christopher authored
llvm-svn: 103974
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Bob Wilson authored
Obvious in retrospect but not fun to debug. llvm-svn: 103969
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Evan Cheng authored
Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers! llvm-svn: 103960
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Evan Cheng authored
llvm-svn: 103917
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- May 16, 2010
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Dale Johannesen authored
<1xi64> -> i64 to work in MMX registers on hosts where -no-sse is the default (not mine). The right thing is to accept this and make i64->f64 conversions go through memory, but I don't have time right now. llvm-svn: 103914
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Dale Johannesen authored
(This worked as of about 6 months ago and I didn't track down exactly what broke it; I think this fix is appropriate.) llvm-svn: 103911
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Anton Korobeynikov authored
llvm-svn: 103903
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Anton Korobeynikov authored
Patch by Charles Davis and Steven Watanabe! llvm-svn: 103902
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Anton Korobeynikov authored
llvm-svn: 103901
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Evan Cheng authored
llvm-svn: 103898
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- May 15, 2010
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Dale Johannesen authored
The implementation in LegalizeIntegerTypes to handle this as sint64->float + appropriate power of 2 is subject to double rounding, considered incorrect by numerics people. Use this implementation only when it is safe. This leads to using library calls in some cases that produced inline code before, but it's correct now. (EVTToAPFloatSemantics belongs somewhere else, any suggestions?) Add a correctly rounding (though not particularly fast) conversion that uses X87 80-bit computations for x86-32. 7885399, 5901940. This shows up in gcc.c-torture/execute/ieee/rbug.c in the gcc testsuite on some platforms. llvm-svn: 103883
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Anton Korobeynikov authored
This can be extended later on to handle more "complex" constants. llvm-svn: 103881
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Anton Korobeynikov authored
Temporary emit it as raw bytes until it will be added to binutils as well. llvm-svn: 103878
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Evan Cheng authored
llvm-svn: 103868
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