- Sep 11, 2012
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Chad Rosier authored
Add support in the EmitMSInlineAsmStr() function for handling integer consts. llvm-svn: 163645
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Nadav Rotem authored
Dragonegg selfhost exposed additional cases where alloca usage moved outside of lifetime markers. Disabling the pass for now. llvm-svn: 163623
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Nadav Rotem authored
llvm-svn: 163617
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Nadav Rotem authored
llvm-svn: 163616
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Craig Topper authored
Teach DAG combiner to constant fold FABS of a BUILD_VECTOR of ConstantFPs. Factor similar code out of FNEG DAG combiner. llvm-svn: 163587
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Andrew Trick authored
The Hexagon target decided to use a lot of functionality from the target-independent scheduler. That's fine, and other targets should be able to do the same. This reorg and API update makes that easy. For the record, ScheduleDAGMI was not meant to be subclassed. Instead, new scheduling algorithms should be able to implement MachineSchedStrategy and be done. But if need be, it's nice to be able to extend ScheduleDAGMI, so I also made that easier. The target scheduler is somewhat more apt to break that way though. llvm-svn: 163580
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Eric Christopher authored
right now. We'll fix PR13303 a different way. llvm-svn: 163570
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Eric Christopher authored
llvm-svn: 163569
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Eric Christopher authored
llvm-svn: 163568
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Eric Christopher authored
llvm-svn: 163567
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- Sep 10, 2012
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Chad Rosier authored
and InlineAsmVariant don't match. llvm-svn: 163550
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Dmitri Gribenko authored
llvm-svn: 163547
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Nadav Rotem authored
llvm-svn: 163545
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Chad Rosier authored
and update the printOperand() function accordingly. llvm-svn: 163544
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Nadav Rotem authored
llvm-svn: 163539
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Nadav Rotem authored
llvm-svn: 163530
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Michael Ilseman authored
This folding happens as early as possible for performance reasons, and to make sure it isn't foiled by other transforms (e.g. forming FMAs). llvm-svn: 163519
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Michael Ilseman authored
llvm-svn: 163518
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James Molloy authored
Fix an assertion failure when optimising a shufflevector incorrectly into concat_vectors, and a followup bug with SelectionDAG::getNode() creating nodes with invalid types. llvm-svn: 163511
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Nadav Rotem authored
llvm-svn: 163510
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Nadav Rotem authored
llvm-svn: 163509
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Nadav Rotem authored
Stack Coloring: When searching for disjoint regions, do not compare intervals twice or to theirself. llvm-svn: 163508
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Nadav Rotem authored
llvm-svn: 163507
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Nadav Rotem authored
llvm-svn: 163496
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Nadav Rotem authored
llvm-svn: 163495
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Nadav Rotem authored
llvm-svn: 163494
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Craig Topper authored
llvm-svn: 163483
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- Sep 09, 2012
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Benjamin Kramer authored
LiveVariables: Compute a set of defs and kills to speed up updating LV during critical edge splitting. Previously we checked if the register is def'd in a block via the def/use list a nd walked the list of kills to check if the register is killed in a block. Both of these checks can be made much cheaper by walking the block first and recording all defs and kills. This reduces the compile time of the test case from PR13651 from 40s to 15s at -O2. The compile time is still dominated by LV updating but now the main culprit is SparseBitVector's slowness. llvm-svn: 163478
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- Sep 07, 2012
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Benjamin Kramer authored
For some reason .lcomm uses byte alignment and .comm log2 alignment so we can't use the same setting for both. Fix this by reintroducing the LCOMM enum. I verified this against mingw's gcc. llvm-svn: 163420
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Chad Rosier authored
llvm-svn: 163416
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Chad Rosier authored
llvm-svn: 163401
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Benjamin Kramer authored
- Darwin lied about not supporting .lcomm and turned it into zerofill in the asm parser. Push the zerofill-conversion down into macho-specific code. - This makes the tri-state LCOMMType enum superfluous, there are no targets without .lcomm. - Do proper error reporting when trying to use .lcomm with alignment on a target that doesn't support it. - .comm and .lcomm alignment was parsed in bytes on COFF, should be power of 2. - Fixes PR13755 (.lcomm crashes on ELF). llvm-svn: 163395
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Michael Liao authored
- this should fix PR13780 llvm-svn: 163370
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- Sep 06, 2012
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Manman Ren authored
No functional change. llvm-svn: 163339
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Jakob Stoklund Olesen authored
The RegisterCoalescer understands overlapping live ranges where one register is defined as a copy of the other. With this change, register allocators using LiveRegMatrix can do the same, at least for copies between physical and virtual registers. When a physreg is defined by a copy from a virtreg, allow those live ranges to overlap: %CL<def> = COPY %vreg11:sub_8bit; GR32_ABCD:%vreg11 %vreg13<def,tied1> = SAR32rCL %vreg13<tied0>, %CL<imp-use,kill> We can assign %vreg11 to %ECX, overlapping the live range of %CL. llvm-svn: 163336
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Jakob Stoklund Olesen authored
We will soon allow virtual register live ranges to overlap regunit live ranges when the physreg is defined as a copy of the virtreg: %EAX = COPY %vreg5 FOO %vreg5 BAR %EAX<kill> There is no real interference since %vreg5 and %EAX have the same value where they overlap. This patch prevents addKillFlags from adding virtreg kill flags to FOO where the assigned physreg is overlapping the virtual register live range. llvm-svn: 163335
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Jakob Stoklund Olesen authored
Kill flags are difficult to maintain, and liveness queries are better handled by live intervals. Kill flags are reinserted after register allocation by addKillFlags(). llvm-svn: 163334
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Roman Divacky authored
llvm-svn: 163324
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Nadav Rotem authored
llvm-svn: 163316
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Nadav Rotem authored
llvm-svn: 163309
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