llvm-svn: 30326

llvm-svn: 30316

in a specific BB, don't undo this!).  This allows us to compile
CodeGen/X86/loop-hoist.ll into:

_foo:
        xorl %eax, %eax
***     movl L_Arr$non_lazy_ptr, %ecx
        movl 4(%esp), %edx
LBB1_1: #cond_true
        movl %eax, (%ecx,%eax,4)
        incl %eax
        cmpl %edx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

instead of:

_foo:
        xorl %eax, %eax
        movl 4(%esp), %ecx
LBB1_1: #cond_true
***     movl L_Arr$non_lazy_ptr, %edx
        movl %eax, (%edx,%eax,4)
        incl %eax
        cmpl %ecx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

This was noticed in 464.h264ref.  This doesn't usually affect PPC,
but strikes X86 all the time.

llvm-svn: 30290

        addl %ecx, %ecx
        adcl %eax, %eax

instead of:

        movl %ecx, %edx
        addl %edx, %edx
        shrl $31, %ecx
        addl %eax, %eax
        orl %ecx, %eax

and to:

        addc r5, r5, r5
        adde r4, r4, r4

instead of:

        slwi r2,r9,1
        srwi r0,r11,31
        slwi r3,r11,1
        or r2,r0,r2

on PPC.

llvm-svn: 30284

representing expressions that can only be resolved at link time, etc.

llvm-svn: 30278

llvm-svn: 30240

due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.

This fixes 458.sjeng on x86 with llc.

llvm-svn: 30236

llvm-svn: 30225

llvm-svn: 30217

the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.

llvm-svn: 30207

safe for later allocation.  This fixes McCat/18-imp with llc-beta.

llvm-svn: 30204

llvm-svn: 30198

of unallocatable registers, just because an alias is allocatable.  We were
picking registers like SIL just because ESI was being used.

llvm-svn: 30197

llvm-svn: 30162

llvm-svn: 30151

too many phi operands when lowering a switch to branches in some cases.

llvm-svn: 30142

llvm-svn: 30126

llvm-svn: 30122

llvm-svn: 30118

llvm-svn: 30117

llvm-svn: 30114

def operand or a use operand.

llvm-svn: 30109

actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.

llvm-svn: 30108

llvm-svn: 30099

llvm-svn: 30098

llvm-svn: 30097

Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example

llvm-svn: 30095

llvm-svn: 30082

llvm-svn: 30066

llvm-svn: 30065

Just because an alias of a register is available, it doesn't mean that we
can arbitrarily evict the register.

llvm-svn: 30064

livevariables information.  This fixes several regalloc=local failures on x86

llvm-svn: 30062

instruction includes physregs.

llvm-svn: 30061

llvm-svn: 30054

Restore it, which re-fixes X86/2006-08-21-ExtraMovInst.ll

llvm-svn: 30050

method for joining the live ranges instead of the fully-general one.

llvm-svn: 30049

possible and the target only supports MULHS.

llvm-svn: 30022

llvm-svn: 30021

need recursion.

llvm-svn: 30015

analysis 16% on crafty.

Wrap long lines.

llvm-svn: 30012