llvm-svn: 118968

llvm-svn: 118965

instructions.

llvm-svn: 118963

llvm-svn: 118962

llvm-svn: 118959

llvm-svn: 118958

flag for the LDRT/STRT family instructions as a side effect.

llvm-svn: 118955

llvm-svn: 118954

llvm-svn: 118951

2. Fixing improper immediate mode reverse subtract.

llvm-svn: 118948

llvm-svn: 118946

llvm-svn: 118945

llvm-svn: 118943

llvm-svn: 118942

2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer

llvm-svn: 118941

llvm-svn: 118940

llvm-svn: 118939

Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget.

llvm-svn: 118938

an address is in a different block, get it into a register and go
from there.

llvm-svn: 118936

llvm-svn: 118935

llvm-svn: 118926

to splitting the load/store pre/post indexed instructions into [r, r] and
[r, imm] forms.

llvm-svn: 118925

llvm-svn: 118924

"%z = %x and %y".  If GVN can prove that %y equals %x, then it turns
this into "%z = %x and %x".  With the new code, %z will be replaced
with %x everywhere (and then deleted).  Previously %z would be value
numbered too, which is a waste of time.  Also, while a clever value
numbering algorithm would give %z the same value number as %x, our
current one doesn't do so (at least I don't think it does).  The new
logic has an essentially equivalent effect to what you would get if
%z was given the same value number as %x, i.e. it should make value
numbering smarter.  While there, get hold of target data once at the
start rather than a gazillion times all over the place.

llvm-svn: 118923

Add some missing isel predicates on def : pat patterns to avoid generating VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next.

llvm-svn: 118922

llvm-svn: 118921

llvm-svn: 118920

llvm-svn: 118919

from the user of the address, fall back to just using the
address in a register instead of bailing out of fast-isel
altogether.

llvm-svn: 118917

llvm-svn: 118916

We only produce debug line information if we have seen a line directive, so
this code is dead. Also, if we want to be bug by bug compatible with
gas and sometimes produce "empty" .debug_line sections, this will
match the content produced by gas.

llvm-svn: 118914

llvm-svn: 118913

llvm-svn: 118907

llvm-svn: 118905

catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.

llvm-svn: 118904

llvm-svn: 118903

llvm-svn: 118896

llvm-svn: 118893

at least.

llvm-svn: 118890

support for the case where alignment<value size.

These cases were silently miscompiled before this patch.
Now they are overly verbose -especially storing is- and
any front-end should still avoid misaligned memory 
accesses as much as possible. The bit juggling algorithm
added here probably has some room for improvement still.

llvm-svn: 118889