- May 21, 2010
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Evan Cheng authored
Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs. llvm-svn: 104385
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Chris Lattner authored
llvm-svn: 104383
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Abramo Bagnara authored
llvm-svn: 104382
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Eric Christopher authored
llvm-svn: 104381
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Bob Wilson authored
so that it will continue to test what it was meant to test when I commit a separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon. Fix a DAG combiner crash exposed by this test change. llvm-svn: 104380
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Chris Lattner authored
llvm-svn: 104379
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Chris Lattner authored
now done and no more patches to it will be accepted. llvm-svn: 104378
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Evan Cheng authored
that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. llvm-svn: 104377
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John McCall authored
Fixes <rdar://problem/7987650>. llvm-svn: 104376
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Ted Kremenek authored
within the increment code of a for loop. llvm-svn: 104375
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Douglas Gregor authored
CXXBasePaths::isAmbiguous(), rather than just asserting that we have a canonical type. Fixes PR7176. llvm-svn: 104374
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Chris Lattner authored
Steven Watanabe! llvm-svn: 104373
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Jakob Stoklund Olesen authored
reads or writes a register. This takes partial redefines and undef uses into account. Don't actually use it yet. That caused miscompiles. llvm-svn: 104372
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Benjamin Kramer authored
llvm-svn: 104371
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Devang Patel authored
llvm-svn: 104338
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Dale Johannesen authored
llvm-svn: 104337
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Dale Johannesen authored
Case where MMX is disabled wasn't handled right. MMX->MMX bitconverts are Legal. llvm-svn: 104336
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Douglas Gregor authored
emitted the increment expression. Fixes PR7189. If someone knows how to write a useful test for this, I'd be grateful. llvm-svn: 104335
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Nathan Jeffords authored
If the size of the string is greater than the zero fill size, the function will attempt to write a very large string of zeros to the object file (~4GB on 32 bit platforms). This assertion will catch the scenario and crash the program before the write occurs. llvm-svn: 104334
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Chris Lattner authored
pass after isel instead of being interlaced with it, we can trust that all the code for a function has been isel'd before it is run. The practical impact of this is that we can scan for machine instr phis instead of doing a fuzzy match on the LLVM BB for phi nodes. Doing the fuzzy match required knowing when isel would produce an fp reg stack phi which was gross. It was also wrong in cases where select got lowered to a branch tree because cmovs aren't available (PR6828). Just do the scan on machine phis which is simpler, faster and more correct. This fixes PR6828. llvm-svn: 104333
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Nick Lewycky authored
llvm-svn: 104332
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Chris Lattner authored
llvm-svn: 104331
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Chris Lattner authored
llvm-svn: 104330
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Chris Lattner authored
eliminating the gymnastics around the ContainsFPCode var. llvm-svn: 104328
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Douglas Gregor authored
not make copies non-POD arguments or arguments passed by reference: just copy the pointers directly. This eliminates another source of the dreaded memcpy-of-non-PODs. Fixes PR7188. llvm-svn: 104327
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Chris Lattner authored
llvm-svn: 104326
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Chris Lattner authored
llvm-svn: 104325
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Jakob Stoklund Olesen authored
This reverts r104322. I think it was causing miscompilations. llvm-svn: 104323
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Jakob Stoklund Olesen authored
This correctly handles partial redefines and undef uses. llvm-svn: 104322
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Jakob Stoklund Olesen authored
definitions of the virtual register. This happens when spilling the registers produced by REG_SEQUENCE: %reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0 The rewriter would spill the register multiple times, dead store elimination tried to keep up, but ended up cutting the branch it was sitting on. llvm-svn: 104321
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Jakob Stoklund Olesen authored
<imp-def> operand for the full register. This ensures that the full physical register is marked live after register allocation. llvm-svn: 104320
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Fariborz Jahanian authored
llvm-svn: 104319
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Matt Fleming authored
isn't ideal if we want to be able to use another object file format. Add a createObjectStreamer() factory method so that the correct object file streamer can be instantiated for a given target triple. llvm-svn: 104318
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Matt Fleming authored
differently. This will make adding ELF support easier in the long run. llvm-svn: 104317
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Matt Fleming authored
llvm-svn: 104316
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Chandler Carruth authored
Factor its implementation to ease the addition of these custom edges to traverse. With this patch we get initializer expressions, block bodies, type source info, and function argument, result, and exception types. There are probably still some more missed edges. While we're here, clean up and flesh out a bunch of comments. Patch by Zhanyong Wan; I've done a cursory review, but further review appreciated. This is fast becoming one of the most important public APIs to the AST. llvm-svn: 104315
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Chandler Carruth authored
llvm-svn: 104314
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John McCall authored
'self' variable arising from uses of the 'super' keyword. Also reorganize some code so that BlockInfo (now CGBlockInfo) can be opaque outside of CGBlocks.cpp. Fixes rdar://problem/8010633. llvm-svn: 104312
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Lang Hames authored
llvm-svn: 104311
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John McCall authored
class initialization, drill down through an arbitrary number of anonymous records. llvm-svn: 104310
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