Start refactoring of asmprinters: provide a TAI hook, which will select a 'section kind' for a global.

llvm-svn: 52868

llvm-svn: 52866

llvm-svn: 52865

llvm-svn: 52864

llvm-svn: 52863

llvm-svn: 52862

llvm-svn: 52861

llvm-svn: 52860

llvm-svn: 52859

Make intel asmprinter child of generic asmprinter, not x86 shared asm printer. This leads to some code duplication, which will be resolved later.

llvm-svn: 52858

llvm-svn: 52857

llvm-svn: 52856

llvm-svn: 52836

Patch by Gary Benson!

llvm-svn: 52828

This speeds up LiveVariables from 0.6279s to 0.6165s on kimwitu++.

llvm-svn: 52818

Patch by Hasso Tepper!

llvm-svn: 52781

<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code.  The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing.  This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)

llvm-svn: 52750

  shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.

llvm-svn: 52740

InvalidateInstructionCache method instead of calling through
a hook on the JIT.  This is a host feature, not a target feature.

llvm-svn: 52734

llvm-svn: 52725

the base SDNode's VTList.

llvm-svn: 52722

Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub

llvm-svn: 52706

llvm-svn: 52701

load,store,call,return,bitcast.  This is enough to
make call and return work.

llvm-svn: 52691

If it's determined safe, remat MOV32r0 (i.e. xor r, r) and others as it is instead of using the longer MOV32ri instruction.

llvm-svn: 52670

llvm-svn: 52663

general solution possible, but it's a fairly simple one.
Based on a patch from the OpenGTL project!

llvm-svn: 52662

llvm-svn: 52613

llvm-svn: 52594

shuffle could be skipped.  The check is invalid because the loop index i 
doesn't correspond to the element actually inserted. The correct check is
already done a few lines earlier, for whether the element is already in 
the right spot, so this shouldn't have any effect on the codegen for 
code that was already correct.

llvm-svn: 52486

llvm-svn: 52478

llvm-svn: 52454

llvm-svn: 52439

llvm-svn: 52420

llvm-svn: 52419

Patch by Gary Benson!

llvm-svn: 52418

Rather than avoiding to wrap ISD::DECLARE GV operand in X86ISD::Wrapper, simply handle it at dagisel time with x86 specific isel code.

llvm-svn: 52377

llvm-svn: 52363

llvm-svn: 52352

Patch by Gary Benson!

llvm-svn: 52332