llvm-svn: 46424

f7/f11 to:

_f7:
	eor r0, r0, #2, 2 @ -2147483648
	bx lr
_f11:
	bic r0, r0, #2, 2 @ -2147483648
	bx lr

instead of:

_f7:
	fmsr s0, r0
	fnegs s0, s0
	fmrs r0, s0
	bx lr

_f11:
	fmsr s0, r0
	fabss s0, s0
	fmrs r0, s0
	bx lr

llvm-svn: 46423

llvm-svn: 46422

llvm-svn: 46421

llvm-svn: 46420

llvm-svn: 46419

llvm-svn: 46417

longer allowed to write through byval arguments.

llvm-svn: 46416

registers if used by a bitconvert or using a bitconvert.  This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway.  For example, we now 
compile CodeGen/X86/fp-in-intregs.ll to:

_test1:
	movl	$2147483648, %eax
	xorl	4(%esp), %eax
	ret
_test2:
	movl	$1065353216, %eax
	orl	4(%esp), %eax
	andl	$3212836864, %eax
	ret

Instead of:
_test1:
	movss	4(%esp), %xmm0
	xorps	LCPI2_0, %xmm0
	movd	%xmm0, %eax
	ret
_test2:
	movss	4(%esp), %xmm0
	andps	LCPI3_0, %xmm0
	movss	LCPI3_1, %xmm1
	andps	LCPI3_2, %xmm1
	orps	%xmm0, %xmm1
	movd	%xmm1, %eax
	ret

bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.

llvm-svn: 46414

llvm-svn: 46413

llvm-svn: 46411

llvm-svn: 46410

llvm-svn: 46409

This fixes PR1769.

llvm-svn: 46408

For long double constants, print an approximation of their value to the .s file to make it easier to read.

llvm-svn: 46407

llvm-svn: 46406

llvm-svn: 46405

now that the dag combiner does it.

llvm-svn: 46404

continues to infer alignment info.

llvm-svn: 46403

llvm-svn: 46402

from the stack.  This allows us to compile stack-align.ll to:

_test:
	movsd	LCPI1_0, %xmm0
	movapd	%xmm0, %xmm1
***	andpd	4(%esp), %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret

instead of:

_test:
	movsd	LCPI1_0, %xmm0
**	movsd	4(%esp), %xmm1
**	andpd	%xmm0, %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret

llvm-svn: 46401

llvm-svn: 46400

readonly functions to use byval parameters as local
storage (how much do we want this?).

llvm-svn: 46399

nop. Emit the nop directly for PPC.

llvm-svn: 46398

llvm-svn: 46397

llvm-svn: 46396

llvm-svn: 46395

a "nop" instruction so that we don't have the function's label associated
with something that it's not supposed to be associated with.

llvm-svn: 46394

when inlining a readonly function.

llvm-svn: 46393

llvm-svn: 46389

llvm-svn: 46388

void bork() {
  int *address = 0;
  *address = 0;
}

It's compiled into LLVM code that looks like this:

define void @bork() noreturn nounwind  {
entry:
        unreachable
}

This is bad on some platforms (like PPC) because it will generate the label for
the function but no body. The label could end up being associated with some
non-code related stuff, like a section. This places a "trap" instruction if the
SimplifyCFG pass removed all code from the function leaving only one
"unreachable" instruction.

llvm-svn: 46387

llvm-svn: 46386

llvm-svn: 46385

delete a node even if it was not dead in some cases.  Instead, just add it to
the worklist.  Also, make sure to use the CombineTo methods, as it was doing
things that were unsafe: the top level combine loop could touch dangling memory.

This fixes CodeGen/Generic/2008-01-25-dag-combine-mul.ll

llvm-svn: 46384

don't bother making x&-1 only to simplify it in dag combine.  This commonly occurs expanding i64 ops.

llvm-svn: 46383

llvm-svn: 46382

Added back logic in patch r46361 (http://llvm.org/viewvc/llvm-project?rev=46361&view=rev) with the addition of
some previously missing NULL pointer checks.

Modified the UninitializedValues analysis to not expect that every Expr* at the
block-level is a block-level expression (we probably need to change the name of
such expressions to something truer to their meaning).

llvm-svn: 46380

llvm-svn: 46379

a template-template parameter.

llvm-svn: 46378