Differential Revision: http://llvm-reviews.chandlerc.com/D598

llvm-svn: 179725

llvm-svn: 179724

llvm-svn: 179721

unable to handle cases such as __asm mov eax, 8*-8.

This patch also attempts to simplify the state machine.  Further, the error
reporting has been improved.  Test cases included, but more will be added to
the clang side shortly.
rdar://13668445

llvm-svn: 179719

[objc-arc] Added descriptions for EnableARCAnnotations, EnableCheckForCFGHazards, EnableARCOptimizations.

llvm-svn: 179718

llvm-svn: 179717

for the sdiv/srem/udiv/urem bitcode instructions.  This is done for the i8,
i16, and i32 types, as well as i64 for the x86_64 target.

Patch by Jim Stichnoth

llvm-svn: 179715

getSimpleVT can only handle simple value types.

radar://13676022

llvm-svn: 179714

PR15000 has a testcase where the time to compile was bordering on 30s. When I
dropped the limit value to 100, it became a much more managable 6s. The compile
time seems to increase in a roughly linear fashion based on increasing the limit
value. (See the runtimes below.)

So, let's lower the limit to 100 so that they can get a more reasonable compile
time.

Limit Value  Time
-----------  ----
10           0.9744s
20           1.8035s
30           2.3618s
40           2.9814s
50           3.6988s
60           4.5486s
70           4.9314s
80           5.8012s
90           6.4246s
100          7.0852s
110          7.6634s
120          8.3553s
130          9.0552s
140          9.6820s
150          9.8804s
160         10.8901s
170         10.9855s
180         12.0114s
190         12.6816s
200         13.2754s
210         13.9942s
220         13.8097s
230         14.3272s
240         15.7753s
250         15.6673s
260         16.0541s
270         16.7625s
280         17.3823s
290         18.8213s
300         18.6120s
310         20.0333s
320         19.5165s
330         20.2505s
340         20.7068s
350         21.1833s
360         22.9216s
370         22.2152s
380         23.9390s
390         23.4609s
400         24.0426s
410         24.6410s
420         26.5208s
430         27.7155s
440         26.4142s
450         28.5646s
460         27.3494s
470         29.7255s
480         29.4646s
490         30.5001s

llvm-svn: 179713

The reference manual defines only 5 permitted values for the immediate field of the "hint" instruction:
1. nop (imm == 0)
2. yield (imm == 1)
3. wfe (imm == 2)
4. wfi (imm == 3)
5. sev (imm == 4)

Therefore, restrict the permitted values for the "hint" instruction to 0 through 4.

Patch by Mihail Popa <Mihail.Popa@arm.com>

llvm-svn: 179707

llvm-svn: 179703

GCC complains: Core.cpp:1449:27: warning: overflow in implicit constant conversion [-Woverflow]
I'm not sure if that's really a problem here, but using the enum type is better
style anyways.

llvm-svn: 179696

PowerPC: Mark some more patterns as isCodeGenOnly.

A couple of recently introduced conditional branch patterns
also need to be marked as isCodeGenOnly since they cannot
be handled by the asm parser.

No change in generated code.

llvm-svn: 179690

llvm-svn: 179686

llvm-svn: 179685

llvm-svn: 179684

llvm-svn: 179682

Moves one DWARF-specific header to include/llvm/DebugInfo from lib/.
Add a short unittest for r179095.

llvm-svn: 179678

Broken in r179657.

llvm-svn: 179669

CR feedback from Rafael Espindola and Paul Robinson.

llvm-svn: 179664

Differential Revision: http://llvm-reviews.chandlerc.com/D620

llvm-svn: 179661

This patch allows the Mips assembler to parse and emit nested 
expressions as instruction operands. It also extends the 
expansion of memory instructions when an offset is given as 
an expression. 

Contributer: Vladimir Medic
llvm-svn: 179657

cases to be submitted on clang side shortly.
rdar://13663768 and PR15760

llvm-svn: 179655

llvm-svn: 179648

llvm-svn: 179647

llvm-svn: 179646

llvm-svn: 179645

llvm-svn: 179622

llvm-svn: 179611

llvm-svn: 179610

llvm-svn: 179607

llvm-svn: 179601

llvm-svn: 179593

llvm-svn: 179591

LLVMGetThreadLocalMode - exposes GlobalVariable::getThreadLocalMode
LLVMSetThreadLocalMode - exposes GlobalVariable::setThreadLocalMode
LLVMIsExternallyInitialized - exposes GlobalVariable::isExternallyInitialized
LLVMSetExternallyInitialized - exposes GlobalVariable::setExternallyInitialized
LLVMThreadLocalMode - maps to GlobalVariable::ThreadLocalMode

Patch by Moritz Maxeiner!

llvm-svn: 179588

If a switch instruction has a case for every possible value of its type,
with the same successor, SimplifyCFG would replace it with an icmp ult,
but the computation of the bound overflows in that case, which inverts
the test.

Patch by Jed Davis!

llvm-svn: 179587

llvm-svn: 179582

These are aliases for VACGT and VACGE, respectively, with the source
operands reversed.

rdar://13638090

llvm-svn: 179575

Two return types are not equivalent if one is a pointer and the other is an
integral. This is because we cannot bitcast a pointer to an integral value.
PR15185

llvm-svn: 179569

This patch allows the assembler to recognize $fcc0 
as a valid register for conditional move instructions. 

Corresponding test cases have been added.

Contributer: Vladimir Medic
llvm-svn: 179567