This fixes some problems with too conservative checking where we were
marking all aliases of a register as used, and then also checking all
aliases when allocating a register.

<rdar://problem/13249625>

llvm-svn: 175782

llvm-svn: 175765

A legal BUILD_VECTOR goes in and gets constant folded into another legal
BUILD_VECTOR so we don't lose any legality here. The problematic PPC
optimization that made this check necessary was fixed recently.

llvm-svn: 175759

llvm-svn: 175732

llvm-svn: 175731

This brings the number of remaining failures in 'make check' without
LiveVariables down to 39, with 1 unexpectedly passing test.

llvm-svn: 175727

llvm-svn: 175726

available.

With this commit there are no longer any assertion or verifier failures when
running 'make check' without LiveVariables. There are still 56 failing tests
with codegen differences and 1 unexpectedly passing test.

llvm-svn: 175719

Rewrite value numbers directly in the 'Other' LiveInterval which is
moribund anyway. This avoids allocating the OtherAssignments vector.

llvm-svn: 175690

just be turned into kills on the spot.

llvm-svn: 175688

When findReachingDefs() finds that only one value can reach the basic
block, just copy the work list of visited blocks directly into the live
interval.

Sort the block list and use a LiveRangeUpdater to make the bulk add
fast.

When multiple reaching defs are found, transfer the work list to the
updateSSA() work list as before. Also use LiveRangeUpdater in
updateLiveIns() following updateSSA().

This makes live interval analysis more than 3x faster on one huge test
case.

llvm-svn: 175685

and SlotIndexes.

llvm-svn: 175674

automatically.

llvm-svn: 175673

related failures when running 'make check' without LiveVariables with the
verifier enabled. Some of the remaining failures elsewhere may still be fallout
from incorrect updating of LiveIntervals or the few missing cases left in the
two-address pass.

llvm-svn: 175672

(2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y)))
can be folded into a (2xi32) (buildvector i32 a, i32 b).

Such a DAG would cause uneccessary vdup instructions followed by vmovn
instructions.

We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in
the vectorized version of the code below.

double A[N];
double B[N];

void test_double_compare_to_double() {
  int i;
  for(i=0;i<N;i++)
    A[i] = (double)(A[i] < B[i]);
}

radar://13191881

Fixes bug 15283.

llvm-svn: 175670

http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly

ivars should be camel-case and start with an upper-case letter. A few in
TargetLowering were starting with a lower-case letter.

No functional change intended.

llvm-svn: 175667

Performance is the same, but LiveRangeUpdater has a more flexible
interface.

llvm-svn: 175645

Adding new segments to large LiveIntervals can be expensive because the
LiveRange objects after the insertion point may need to be moved left or
right. This can cause quadratic behavior when adding a large number of
segments to a live range.

The LiveRangeUpdater class allows the LIveInterval to be in a temporary
invalid state while segments are being added. It maintains an internal
gap in the LiveInterval when it is shrinking, and it has a spill area
for new segments when the LiveInterval is growing.

The behavior is similar to the existing mergeIntervalRanges() function,
except it allocates less memory for the spill area, and the algorithm is
turned inside out so the loop is driven by the clients.

llvm-svn: 175644

- When extloading from a vector with non-byte-addressable element, e.g.
  <4 x i1>, the current logic breaks. Extend the current logic to
  fix the case where the element type is not byte-addressable by loading
  all bytes, bit-extracting/packing each element.

llvm-svn: 175642

llvm-svn: 175621

llvm-svn: 175608

common transformations. This includes updating repairIntervalsInRange() to
handle more cases.

llvm-svn: 175604

correct value is needed in every iteration of the loop for updating
LiveIntervals.

llvm-svn: 175603

and removing instructions. The implementation seems more complicated than it
needs to be, but I couldn't find something simpler that dealt with all of the
corner cases.

Also add a call to repairIndexesInRange() from repairIntervalsInRange().

llvm-svn: 175601

after the two-address pass. The remaining problems in 'make check' are occurring
later.

llvm-svn: 175598

llvm-svn: 175597

llvm-svn: 175596

llvm-svn: 175581

Target implementations of getRegAllocationHints() should use the
provided allocation order, and they can never return hints outside the
order. This is already documented in TargetRegisterInfo.h.

<rdar://problem/13240556>

llvm-svn: 175540

Due to the execution order of doFinalization functions, the GC information were
deleted before AsmPrinter::doFinalization was executed. Thus, the
GCMetadataPrinter::finishAssembly was never called.

The patch fixes that by moving the code of the GCInfoDeleter::doFinalization to
Printer::doFinalization.

llvm-svn: 175528

llvm-svn: 175490

llvm-svn: 175488

llvm-svn: 175487

llvm-svn: 175485

llvm-svn: 175484

llvm-svn: 175457

llvm-svn: 175456

[ms-inline asm] Fix undefined behavior to reset hasMSInlineAsm in advance of SelectAllBasicBlocks().

llvm-svn: 175422

arguably better than forward iterators for this use case, they are confusing and
there are some implementation problems with reverse iterators and MI bundles.

llvm-svn: 175393

llvm-svn: 175385