Cosmetic changes to spacing to match gcc (some dejagnu
tests actually care).

llvm-svn: 45848

Likewise fix up a bunch of other libcalls.  While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere.  This fixes 9 Ada ACATS failures.

llvm-svn: 45833

inferred from the instr patterns.

llvm-svn: 45824

llvm-svn: 45821

because assembler/linker can't cope with weak absolutes.
PR 1880.

llvm-svn: 45811

on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

llvm-svn: 45746

the code generated is not wonderful.  This turns a miscompilation into
a code quality bug (noted in the ppc readme).  This fixes PR642, which
is over 2 years old (!).  Nate, please review this.

llvm-svn: 45742

Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695

llvm-svn: 45691

llvm-svn: 45683

llvm-svn: 45680

llvm-svn: 45679

that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

Some day I'll get it all moved over...

llvm-svn: 45672

llvm-svn: 45667

llvm-svn: 45656

instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654

llvm-svn: 45652

llvm-svn: 45562

for non-function GV relocations that require function address stubs (e.g. Mac OS X in non-static mode).

llvm-svn: 45527

llvm-svn: 45493

llvm-svn: 45484

Fix a bug in my previous patch: refer to the impl not the pure virtual version.  It's unclear why gcc would ever compile this...

llvm-svn: 45476

a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475

Machine-level API cleanup instigated by Chris.

llvm-svn: 45470

that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467

e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464

  - Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461

Use MachineOperand::getImm instead of MachineOperand::getImmedValue.  Likewise setImmedValue -> setImm

llvm-svn: 45453

llvm-svn: 45418

llvm-svn: 45415

llvm-svn: 45282

llvm-svn: 45281

are a couple of issues that show up with the optimizer,
but I don't think they're really EH problems.
(llvm-gcc testsuite users note:  By default the testsuite
uses the unwinding code that's built as part of your local
llvm-gcc, which does not work.  You need to trick it into
using the installed system unwinding code to get useful
results.)

llvm-svn: 45221

llvm-svn: 45190

Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.

llvm-svn: 44960

a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.

llvm-svn: 44701

llvm-svn: 44700

different places to mean different things.  Document what the
one in PPCFunctionInfo means and when it is valid.

llvm-svn: 44699

llvm-svn: 44691