r179494 switched to using the object file info to retrieve the default text
section for some MC streamers. It is possible that initializing an MC
streamer can request sections before the object file info is initialized
when the AutoInitSections flag is set on the streamer.

llvm-svn: 185670

These exception-related opcodes are not used any longer.

llvm-svn: 185625

llvm-svn: 185618

Stop using the ISD::EXCEPTIONADDR and ISD::EHSELECTION when lowering
landing pad arguments. These nodes were previously legalized into
CopyFromReg nodes, but that never worked properly because the
CopyFromReg node weren't guaranteed to be  scheduled at the top of the
basic block.

This meant the exception pointer and selector registers could be
clobbered before being copied to a virtual register.

This patch copies the two physical registers to virtual registers at
the beginning of the basic block, and lowers the landingpad instruction
directly to two CopyFromReg nodes reading the *virtual* registers. This
is safe because virtual registers don't get clobbered.

A future patch will remove the ISD::EXCEPTIONADDR and ISD::EHSELECTION
nodes.

llvm-svn: 185617

Compute the insertion point from the end of the basic block instead of
skipping labels from the front.

This caused failures in landing pads when live-in copies where inserted
before instruction selection.

llvm-svn: 185616

This will soon be tested by exception handling working at all.

llvm-svn: 185615

Revert "Simplify landing pad lowering."
Revert "Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes."

llvm-svn: 185600

These exception-related opcodes are not used any longer.

llvm-svn: 185596

Stop using the ISD::EXCEPTIONADDR and ISD::EHSELECTION when lowering
landing pad arguments. These nodes were previously legalized into
CopyFromReg nodes, but that never worked properly because the
CopyFromReg node weren't guaranteed to be  scheduled at the top of the
basic block.

This meant the exception pointer and selector registers could be
clobbered before being copied to a virtual register.

This patch copies the two physical registers to virtual registers at
the beginning of the basic block, and lowers the landingpad instruction
directly to two CopyFromReg nodes reading the *virtual* registers. This
is safe because virtual registers don't get clobbered.

A future patch will remove the ISD::EXCEPTIONADDR and ISD::EHSELECTION
nodes.

llvm-svn: 185595

This function adds a live-in physical register to an MBB and ensures
that it is copied to a virtual register immediately.

llvm-svn: 185594

llvm-svn: 185589

for them and update all uses.

llvm-svn: 185588

llvm-svn: 185586

(and for consistency).

llvm-svn: 185585

llvm-svn: 185573

llvm-svn: 185523

llvm-svn: 185520

llvm-svn: 185514

llvm-svn: 185513

Use SmallVectorImpl instead of SmallVector for iterators and references to avoid specifying the vector size unnecessarily.

llvm-svn: 185512

Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.

llvm-svn: 185509

Introduce some typedefs for DenseMaps containing SmallVectors so the vector size doesn't have to repeated when creating iterators for the DenseMap.

llvm-svn: 185508

Return SmallVectorImpl& instead of SmallVector& in a couple places to avoid having to specify the vector size in multiple places.

llvm-svn: 185507

Use SmallVectorImpl& instead of SmallVector& to avoid needlessly respecifying the small vector size.

llvm-svn: 185505

Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.

llvm-svn: 185504

avoid adding information for the debug_inlined section when it isn't
going to be emitted anyhow.

llvm-svn: 185500

llvm-svn: 185498

llvm-svn: 185497

grep.

llvm-svn: 185496

llvm-svn: 185495

llvm-svn: 185492

true, so remove the return value and propagate accordingly.

llvm-svn: 185490

Correctly handles ref_addr depending on the Dwarf version. Emit Dwarf with
version from module flag.

TODO: turn on/off features depending on the Dwarf version.
llvm-svn: 185484

llvm-svn: 185480

[DebugInfo] Allow getDebugThreadLocalSymbol to return MCExpr

This allows getDebugThreadLocalSymbol to return a generic MCExpr
instead of just a MCSymbolRefExpr.

This is in preparation for supporting debug info for TLS variables
on PowerPC, where we need to describe the variable location using
a more complex expression than just MCSymbolRefExpr.

llvm-svn: 185460

[DebugInfo] Hold generic MCExpr in AddrPool

This changes the AddrPool infrastructure to enable it to hold
generic MCExpr expressions, not just MCSymbolRefExpr.

This is in preparation for supporting debug info for TLS variables
on PowerPC, where we need to describe the variable location using
a more complex expression than just MCSymbolRefExpr.

llvm-svn: 185459

[DebugInfo] Introduce DIEExpr variant of DIEValue to hold MCExpr values

This partially reverts r185202 and restores DIELabel to hold plain
MCSymbol references.  Instead, we add a new subclass DIEExpr of
DIEValue that can hold generic MCExpr references.

This is in preparation for supporting debug info for TLS variables
on PowerPC, where we need to describe the variable location using
a more complex expression than just MCSymbolRefExpr.

llvm-svn: 185458

"Remove floating point computations form SpillPlacement.cpp."

These commits caused test failures in lencod on clang-native-arm-lnt.

I suspect these changes are only exposing an existing issue, but
reverting anyway to keep the bots passing while we investigate.

llvm-svn: 185447

This is dead code since PIC16 was removed in 2010. The result was an odd mix,
where some parts would carefully pass it along and others would assert it was
zero (most of the object streamer for example).

llvm-svn: 185436

DAGCombiner was counting all uses of a load node  when considering whether it's
worth combining into a zextload. Really, it wants to ignore the chain and just
count real uses.

rdar://problem/13896307

llvm-svn: 185419