Commits · 319904cc7e947083efd9213e42b9c39bc35ceeae · Roger Ferrer / llvm-epi-0.8 · GitLab

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Nov 14, 2011
- Unbreak Release builds. · 319904cc
  Benjamin Kramer authored Nov 14, 2011
  319904cc
- AnalyzeCallOperands function for N32/64. · 0b8bc004
  Akira Hatanaka authored Nov 14, 2011
  0b8bc004
- Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64. · 52359363
  Akira Hatanaka authored Nov 14, 2011
  52359363
- Remove variable that keeps the size of area used to save byval or variable · d673cfe0
  Akira Hatanaka authored Nov 14, 2011
  d673cfe0
Nov 12, 2011
- Fix typo. · 77733535
  Akira Hatanaka authored Nov 12, 2011
  77733535
- Implement Mips64's handling of byval arguments in LowerCall. · 19891f84
  Akira Hatanaka authored Nov 12, 2011
  19891f84
- Implement Mips64's handling of byval arguments in LowerFormalArguments. · fb9bae34
  Akira Hatanaka authored Nov 12, 2011
  fb9bae34
- Function for handling byval arguments. · 202f6400
  Akira Hatanaka authored Nov 12, 2011
  202f6400
Nov 11, 2011
- Mips MC object code emission improvements: · c85e3ff3
  Bruno Cardoso Lopes authored Nov 11, 2011
  c85e3ff3
- Do not try to detect DAG combine patterns for integer multiply-add/sub if value · 4a63d1c0
  Akira Hatanaka authored Nov 11, 2011
  4a63d1c0
- 64-bit atomic instructions. · 21cbc25b
  Akira Hatanaka authored Nov 11, 2011
  21cbc25b
- Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64. · 9189d712
  Akira Hatanaka authored Nov 11, 2011
  9189d712
- Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC. · 4bdfec57
  Akira Hatanaka authored Nov 11, 2011
  4bdfec57
Nov 08, 2011
- Added invariant field to the DAG.getLoad method and changed all calls. · 82cd9e81
  Pete Cooper authored Nov 08, 2011
  82cd9e81
Oct 28, 2011
- Make changes necessary in LowerFormalArguments to support Mips64. · 104b7e3f
  Akira Hatanaka authored Oct 28, 2011
  104b7e3f
- Make changes necessary in LowerCall to support Mips64. · b20a325b
  Akira Hatanaka authored Oct 28, 2011
  b20a325b
- Add variable IsO32 to MipsTargetLowering. · 7989f15d
  Akira Hatanaka authored Oct 28, 2011
  7989f15d
Oct 18, 2011
- Fix misc warnings. Patch by Joe Abbey. · 4c42be5b
  Eli Friedman authored Oct 18, 2011
  4c42be5b
Oct 17, 2011
- Add definitions of conditional moves with 64-bit operands. Comment out code for · a7e0b908
  Akira Hatanaka authored Oct 17, 2011
  a7e0b908
Oct 11, 2011
- Modify lowering of GlobalAddress so that correct code is emitted when target is · 09b23eb7
  Akira Hatanaka authored Oct 11, 2011
  09b23eb7
- Add definitions of 64-bit loads and stores. Add a patterns for unaligned · be68f3c3
  Akira Hatanaka authored Oct 11, 2011
  be68f3c3
Oct 03, 2011
- Add support for 64-bit divide instructions. · b1538f91
  Akira Hatanaka authored Oct 03, 2011
  b1538f91
Sep 30, 2011
- Add definitions of Mips64 rotate instructions. · 7ba8a8d6
  Akira Hatanaka authored Sep 30, 2011
  7ba8a8d6
Sep 26, 2011
- Set register class of a register according to value of HasMips64. · a6a9c20c
  Akira Hatanaka authored Sep 26, 2011
  a6a9c20c
- Define variable HasMips64 in MipsTargetLowering. · 7b502920
  Akira Hatanaka authored Sep 26, 2011
  7b502920
- In single float mode, double precision FP arguments are passed in integer · e5ce7090
  Akira Hatanaka authored Sep 26, 2011
  e5ce7090
Sep 24, 2011
- Preparation for adding simple Mips64 instructions. · e96273e7
  Akira Hatanaka authored Sep 24, 2011
  e96273e7
Sep 23, 2011
- Make FGR64RegisterClass available if target is Mips64. · ceb55e72
  Akira Hatanaka authored Sep 23, 2011
  ceb55e72
- Do not rely on the enum values of argument registers A0-A3 being consecutive. · 61bbcce8
  Akira Hatanaka authored Sep 23, 2011
  61bbcce8
Sep 22, 2011
- Remove unnecessary condition check. · 6a5f8b2f
  Akira Hatanaka authored Sep 22, 2011
  6a5f8b2f
Sep 21, 2011
- Change the names of functions isMips* to hasMips*. · bb49e721
  Akira Hatanaka authored Sep 20, 2011
  bb49e721
Sep 19, 2011
- Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren't · 79738336
  Akira Hatanaka authored Sep 19, 2011
  79738336
Sep 06, 2011
- Add codegen support for vector select (in the IR this means a select · f2641e1b
  Duncan Sands authored Sep 06, 2011
  f2641e1b
Aug 29, 2011
- Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enough to fix properly. · 7dfa791f
  Eli Friedman authored Aug 29, 2011
  7dfa791f
Aug 20, 2011
- Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which is not · 419fd4f3
  Akira Hatanaka authored Aug 19, 2011
  419fd4f3
Aug 19, 2011
- Use subword loads instead of a 4-byte load when the size of a structure (or a · fb4161ae
  Akira Hatanaka authored Aug 18, 2011
  fb4161ae
Aug 18, 2011
- Make IsShiftedMask a static function rather than defining it in an · 73d78b7a
  Akira Hatanaka authored Aug 18, 2011
  73d78b7a
- Changed definition of EXT and INS per Bruno's comments. · eea541ce
  Akira Hatanaka authored Aug 17, 2011
  eea541ce
Aug 17, 2011
- Add support for half-word unaligned loads and stores. · b2e7558c
  Akira Hatanaka authored Aug 17, 2011
  b2e7558c
- Move pattern matching for EXT and INS to post-legalization DAGCombine per Bruno's comment. · 184b63d0
  Akira Hatanaka authored Aug 17, 2011
  184b63d0