It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.

This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.

llvm-svn: 96755

MVT::iPTR.

llvm-svn: 96753

llvm-svn: 96752

utility.  Down to 6 ppc failures.

llvm-svn: 96751

<4 x i32> with <4 x float> values if they end up the same
register class.  This gets us up to 231 passes on the ppc
tests (only 7 fails).

llvm-svn: 96750

syntax.

llvm-svn: 96748

least cost matches.  This gets us from 195 -> 208 passes on the ppc codegen tests.

llvm-svn: 96747

and another taking a raw_ostream, but otherwise identical.  Use raw_ostream everywhere.

llvm-svn: 96746

llvm-svn: 96745

This changes the stack overflow in PR6363 to an assertion failure.

llvm-svn: 96744

This fixes PR6348

llvm-svn: 96734

sync with the top of stack.  This fixes a bunch of failures on larger
testcases.

llvm-svn: 96732

llvm-svn: 96731

llvm-svn: 96730

llvm-svn: 96728

With this, the matcher actually works reasonably well, but
crashes on larger examples in the scheduler.

llvm-svn: 96727

body before the push.

llvm-svn: 96726

llvm-svn: 96725

of the matched pattern to use the newly created node results.  Onto
the "making it actually work" phase!

llvm-svn: 96724

llvm-svn: 96720

handled in ARMInstPrinter.cpp.

And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only.

llvm-svn: 96719

2GB-aligned stack anyway? 256 bytes is plenty. Requested by Chris.

llvm-svn: 96718

llvm-svn: 96717

the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization 
etc).

More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.

In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.

llvm-svn: 96716

it to follow the mode needed by the new isel.  Instead of returning
the input and output chains, it just returns the (currently only one,
which is a silly limitation) node that has input and output chains.

Since we want the old thing to still work, add a new 
SelectScalarSSELoad to emulate the old interface.  The XXX suffix
and the wrapper will eventually go away.

llvm-svn: 96715

llvm-svn: 96714

the same thing and is more efficient for the matcher.

llvm-svn: 96713

the same thing and is more efficient for the matcher.

llvm-svn: 96712

llvm-svn: 96711

llvm-svn: 96710

the division would have a remainder.

llvm-svn: 96693

scaled reuse.

llvm-svn: 96692

the armv6 nightly tests.

llvm-svn: 96691

llvm-svn: 96688

Also, FileCheck'ize a test.

llvm-svn: 96686

true or false as its exit condition. These are usually eliminated by
SimplifyCFG, but the may be left around during a pass which wishes
to preserve the CFG.

llvm-svn: 96683

ARM and Thumb tests.

llvm-svn: 96680

dragonegg self-host build.  I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier.  The
symptom of the 96556 miscompile is the following crash:

  llvm[3]: Compiling AlphaISelLowering.cpp for Release build
  cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  Stack dump:
  0.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
  g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg).  Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM.  Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96672

This change probably has no functional effect.

llvm-svn: 96669

llvm-svn: 96663