Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918

__builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end.

__builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load.

We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds.

llvm-svn: 77917

llvm-svn: 77903

This is just the framework to identify the needed workarounds. They are not actually implemented.

llvm-svn: 77902

We use the same constraints as GCC, including those that are slightly insane for inline assembler.

llvm-svn: 77899

Generate code for the Blackfin family of DSPs from Analog Devices:

  http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html
  
We aim to be compatible with the exsisting GNU toolchain found at:

  http://blackfin.uclinux.org/gf/project/toolchain
  
The back-end is experimental.

llvm-svn: 77897

llvm-svn: 77895

llvm-svn: 77894

llvm-svn: 77893

TLOF, unifying all the dwarf targets at the same time.

llvm-svn: 77889

llvm-svn: 77888

object files.

llvm-svn: 77887

llvm-svn: 77878

the only real caller (GetFunctionSizeInBytes) uses it.

The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain.  It should be removed 
IMNSHO, but I'll leave that to ARMish folks to decide.

llvm-svn: 77877

in a header.

llvm-svn: 77874

llvm-svn: 77873

llvm-svn: 77872

llvm-svn: 77871

llvm-svn: 77869

llvm-svn: 77868

llvm-svn: 77867

defaults to being ELF.

llvm-svn: 77866

solaris :)

llvm-svn: 77865

llvm-svn: 77864

no longer depends on TM!

llvm-svn: 77863

llvm-svn: 77861

llvm-svn: 77858

even considering #if 0 code.

llvm-svn: 77856

getLSDASection() to be more specific.  This makes it pretty obvious
that the ELF LSDA section is being specified wrong in PIC mode.  We're
probably getting a lot of startup-time relocations to a readonly page,
which is expensive and bad.

Someone who cares about ELF C++ should investigate this.

llvm-svn: 77847

llvm-svn: 77846

variables either.

llvm-svn: 77844

declaration will end up in.

llvm-svn: 77843

TAI.

llvm-svn: 77842

llvm-svn: 77838

operands.

llvm-svn: 77837

llvm-svn: 77835

llvm-svn: 77834

compute it based on what it knows.  As part of this, rename getSectionForMergeableConstant
to getSectionForConstant because it works for non-mergable constants also.

The only functionality change from this is that Xcore will start dropping
its jump tables into readonly section instead of data section in -static mode.
This should be fine as the linker resolves the relocations.  If this is a
problem, let me know and we'll come up with another solution.

llvm-svn: 77833

testsuite regression with a coming patch.

llvm-svn: 77832

llvm-svn: 77827