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  1. May 08, 2007
  2. May 03, 2007
  3. May 02, 2007
  4. May 01, 2007
  5. Apr 26, 2007
  6. Apr 25, 2007
  7. Apr 17, 2007
    • Evan Cheng's avatar
      Copy coalescing change to prevent a physical register from being pin to a · b881bdab
      Evan Cheng authored
      long live interval that has low usage density.
      1. Change order of coalescing to join physical registers with virtual
         registers first before virtual register intervals become too long.
      2. Check size and usage density to determine if it's worthwhile to join.
      3. If joining is aborted, assign virtual register live interval allocation
         preference field to the physical register.
      4. Register allocator should try to allocate to the preferred register
         first (if available) to create identify moves that can be eliminated.
      
      llvm-svn: 36218
      b881bdab
  8. Mar 20, 2007
  9. Feb 25, 2007
  10. Feb 19, 2007
  11. Feb 17, 2007
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  28. Feb 23, 2006
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  30. Dec 28, 2005
  31. Nov 21, 2005
  32. Sep 21, 2005
  33. Aug 30, 2005
  34. Aug 24, 2005
    • Chris Lattner's avatar
      Keep track of which registers are related to which other registers. · 22e91cc3
      Chris Lattner authored
      Use this information to avoid doing expensive interval intersections for
      registers that could not possible be interesting.  This speeds up linscan
      on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
      itanium llc time on this program is 27.3s now.  This marginally speeds up
      PPC and X86, but they appear to be limited by other parts of linscan, not
      this code.
      
      On this program, on itanium, live intervals now takes 41% of llc time.
      
      llvm-svn: 22986
      22e91cc3
  35. Aug 22, 2005
    • Chris Lattner's avatar
      Try to avoid scanning the fixed list. On architectures with a non-stupid · 834a2316
      Chris Lattner authored
      number of regs (e.g. most riscs), many functions won't need to use callee
      clobbered registers.  Do a speculative check to see if we can get a free
      register without processing the fixed list (which has all of these).  This
      saves a lot of time on machines with lots of callee clobbered regs (e.g.
      ppc and itanium, also x86).
      
      This reduces ppc llc compile time from 184s -> 172s on kc++.  This is probably
      worth FAR FAR more on itanium though.
      
      llvm-svn: 22972
      834a2316
    • Chris Lattner's avatar
      Move some code in the register assignment case that only needs to happen if · 95a157ae
      Chris Lattner authored
      we spill out of the fast path.  The scan of active_ and the calls to
      updateSpillWeights don't need to happen unless a spill occurs.  This reduces
      debug llc time of kc++ with ppc from 187.3s to 183.2s.
      
      llvm-svn: 22971
      95a157ae
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