instructions.

llvm-svn: 110360

uses.

llvm-svn: 110274

llvm-svn: 109877

we are using AVX and no AVX version of the desired intruction is present,
this is better for incremental dev (without fallbacks it's easier to spot
what's missing). Not sure this is the best hack thought (we can also disable
all HasSSE* predicates by dinamically marking them 'false' if AVX is present)

llvm-svn: 109434

llvm-svn: 109206

Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual

llvm-svn: 109204

for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.

llvm-svn: 109078

the wrong directory.

llvm-svn: 109005

Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.

llvm-svn: 109004

llvm-svn: 108769

instruction, we only want to allow the one for the current subtarget.
 - This also fixes suffix matching for jmp instructions, because it eliminates
   the ambiguity between 'jmpl' and 'jmpq'.

llvm-svn: 108746

llvm-svn: 108684

llvm-svn: 108683

llvm-svn: 108680

llvm-svn: 108679

notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.

llvm-svn: 107996

jumps where possible and turning the TAILCALL marker in the instruction
asm string into a proper comment.

This eliminates a FIXME and is on the path to finishing:
rdar://7639610 - eliminate encoding and asm info for TAILJMPd TAILJMPr TAILJMPn, etc.

However, I can't eliminate the encodings for these instructions because the JIT
still exists and has its own copy of the encoder, sigh.

llvm-svn: 107946

like all other instructions, even though a segment is not
allowed.  This resolves a bunch of gross hacks in the 
encoder and makes LEA more consistent with the rest of the
instruction set.

No functionality change.

llvm-svn: 107934

in the integrated assembler.  Still some discussion to be
done.

llvm-svn: 107825

llvm-svn: 106717

llvm-svn: 106677

llvm-svn: 106671

llvm-svn: 106621

and operand renaming to help.

The giant turn the constraints on and selectively turn it off
should probably be inverted at some point since it's just largely
50/50.

llvm-svn: 106367

the register.  While we're at it, make sure it's in the right one.

llvm-svn: 105645

llvm-svn: 105381

to be matched.

llvm-svn: 104757

llvm-svn: 104731

Use the tablegen-produced enums.

llvm-svn: 104493

MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
  addw $0xFFFF, %ax
should match the same as
  addw $-1, %ax
but we used to match it to the longer encoding.

llvm-svn: 104453

llvm-svn: 104452

llvm-svn: 104272

instructions.

llvm-svn: 104231

prefix byte problem as in r104062.
 - As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction.

llvm-svn: 104120

argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791

llvm-svn: 103778

llvm-svn: 103776

after testing before committing.

llvm-svn: 103681

llvm-svn: 103677

lower them to the correct x86-64 instructions since we 
don't have a clean way to handle this in td files yet.
rdar://7947184

llvm-svn: 103668