start for consistency.

llvm-svn: 116715

offset for stack references. Make sure we take that into account when
deciding whether to reserver an emergency spill slot for the register
scavenger. rdar://8559625

llvm-svn: 116714

llvm-svn: 116712

llvm-svn: 116711

llvm-svn: 116710

The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.

llvm-svn: 116701

working just fine.

llvm-svn: 116698

llvm-svn: 116694

special case handling for ARM::SP.

llvm-svn: 116688

llvm-svn: 116686

llvm-svn: 116685

llvm-svn: 116683

llvm-svn: 116682

llvm-svn: 116681

llvm-svn: 116680

llvm-svn: 116679

more in the post-passes.

llvm-svn: 116678

single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

llvm-svn: 116675

llvm-svn: 116670

llvm-svn: 116666

if any floating point arguments are passed to an external function.

llvm-svn: 116665

llvm-svn: 116664

llvm-svn: 116659

More machine LICM work. It now tracks register pressure for path from preheader to current BB and use the information determine whether hoisting is worthwhile.

llvm-svn: 116654

llvm-svn: 116653

ARMCodeEmitter::emitMiscInstruction!

llvm-svn: 116644

llvm-svn: 116640

forwarding is implemented with a load/store pair rather than a memcpy.

llvm-svn: 116637

llvm-svn: 116635

llvm-svn: 116628

llvm-svn: 116625

llvm-svn: 116622

llvm-svn: 116612

llvm-svn: 116604

scheduler may reorder loads from them before the stores and other such
badness. PR8347. Patch by David Meyer

llvm-svn: 116602

llvm-svn: 116601

llvm-svn: 116600

llvm-svn: 116594

an explicit def. Make sure to capture that properly. rdar://8556556

llvm-svn: 116591

llvm-svn: 116588