instruction selection to prefer it when possible. rdar://7903972

llvm-svn: 108844

llvm-svn: 108841

- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.

Patch by stetorvs@gmail.com

llvm-svn: 108820

llvm-svn: 108816

llvm-svn: 108812

llvm-svn: 108788

llvm-svn: 108787

out of the AsmPrinter directory into libarm.  Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.

llvm-svn: 108783

of AsmPrinter and InstLowering into libx86 and out of the
asmprinter subdirectory.  Now X86/AsmPrinter just depends on
MC stuff, not all of codegen and LLVM IR.

llvm-svn: 108782

llvm-svn: 108769

ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.

llvm-svn: 108761

instruction, we only want to allow the one for the current subtarget.
 - This also fixes suffix matching for jmp instructions, because it eliminates
   the ambiguity between 'jmpl' and 'jmpq'.

llvm-svn: 108746

it should set the jump table encloding the EK_Inline. This prevents
a second, unused, copy of the table from being emitted after the function
body. PR6581.

llvm-svn: 108730

llvm-svn: 108727

it should set the jump table encloding the EK_Inline. This prevents
a second, unused, copy of the table from being emitted after the function
body. PR7499.

llvm-svn: 108722

llvm-svn: 108685

llvm-svn: 108684

llvm-svn: 108683

assembling; remove crufty custom cleanup code.

llvm-svn: 108681

llvm-svn: 108680

llvm-svn: 108679

TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
 - Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.

llvm-svn: 108677

 - Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.

llvm-svn: 108664

llvm-svn: 108626

llvm-svn: 108625

instruction for non-constant operands. This includes the case referenced
in the README.txt regarding a bitfield copy.

llvm-svn: 108608

llvm-svn: 108603

llvm-svn: 108601

llvm-svn: 108588

stack realignment on ARM.

Also check for function attributes as we do on X86 as well as
make explicit that we're checking can as well as needs in this function.

llvm-svn: 108582

needsStackRealignment is currently checking the can conditions as well.

llvm-svn: 108581

and a combine pattern to use it for setting a bit-field to a constant
value. More to come for non-constant stores.

llvm-svn: 108570

llvm-svn: 108567

llvm-svn: 108566

llvm-svn: 108565

Thumb2ITBlockPass.

llvm-svn: 108564

thus is a much more meaningful name.

llvm-svn: 108563

The isLive() method can read uninitialized memory, but it still gives correct
results.

llvm-svn: 108561

PowerPC.

llvm-svn: 108555

llvm-svn: 108547