- Nov 13, 2011
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Jakob Stoklund Olesen authored
The information was only used by the register allocator in StackSlotColoring. llvm-svn: 144482
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Jakob Stoklund Olesen authored
It was off by default. The new register allocators don't have the problems that made it necessary to reallocate registers during stack slot coloring. llvm-svn: 144481
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Jakob Stoklund Olesen authored
And there was much rejoicing. llvm-svn: 144480
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Jakob Stoklund Olesen authored
The very complicated VirtRegRewriter is going away. llvm-svn: 144479
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Jakob Stoklund Olesen authored
This is dead code, all register allocators use InlineSpiller. llvm-svn: 144478
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Jakob Stoklund Olesen authored
The current register allocators all use the inline spiller. llvm-svn: 144477
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Jakob Stoklund Olesen authored
It is worth noting that the old spiller would split live ranges around basic blocks. The new spiller doesn't do that. PBQP should do its own live range splitting with SplitEditor::splitSingleBlock() if desired. See RAGreedy::tryBlockSplit(). llvm-svn: 144476
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- Nov 12, 2011
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Jakob Stoklund Olesen authored
RegAllocGreedy has been the default for six months now. Deleting RegAllocLinearScan makes it possible to also delete VirtRegRewriter and clean up the spiller code. llvm-svn: 144475
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Rafael Espindola authored
instance and a concrete inlined instance are the use of DW_TAG_subprogram instead of DW_TAG_inlined_subroutine and the who owns the tree. We were also omitting DW_AT_inline from the abstract roots. To fix this, make sure we mark abstract instance roots with DW_AT_inline even when we have only out-of-line instances referring to them with DW_AT_abstract_origin. FileCheck is not a very good tool for tests like this, maybe we should add a -verify mode to llvm-dwarfdump. llvm-svn: 144441
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Eli Friedman authored
llvm-svn: 144438
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Eli Friedman authored
Some cleanup and bulletproofing for node replacement in LegalizeDAG. To maintain LegalizeDAG invariants, whenever we a node is replaced, we must attempt to delete it, and if it still has uses after it is replaced (which can happen in rare cases due to CSE), we must revisit it. llvm-svn: 144432
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- Nov 11, 2011
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Nicolas Geoffray authored
Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint. llvm-svn: 144399
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Eric Christopher authored
llvm-svn: 144360
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Eric Christopher authored
addr DIE when adding to the dwarf accelerator tables. llvm-svn: 144354
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- Nov 10, 2011
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Rafael Espindola authored
it first. This is a more general fix to pr11300. llvm-svn: 144324
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Eric Christopher authored
as well. llvm-svn: 144319
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Eric Christopher authored
forward decls and have names into the dwarf accelerator types table. llvm-svn: 144306
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Eric Christopher authored
multiple dies per function and support C++ basenames. llvm-svn: 144304
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Evan Cheng authored
instruction lower optimization" in the pre-RA scheduler. The optimization, rather the hack, was done before MI use-list was available. Now we should be able to implement it in a better way, perhaps in the two-address pass until a MI scheduler is available. Now that the scheduler has to backtrack to handle call sequences. Adding artificial scheduling constraints is just not safe. Furthermore, the hack is not taking all the other scheduling decisions into consideration so it's just as likely to pessimize code. So I view disabling this optimization goodness regardless of PR11314. llvm-svn: 144267
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Jakob Stoklund Olesen authored
The TII.foldMemoryOperand hook preserves implicit operands from the original instruction. This is not what we want when those implicit operands refer to the register being spilled. Implicit operands referring to other registers are preserved. This fixes PR11347. llvm-svn: 144247
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- Nov 09, 2011
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Eli Friedman authored
llvm-svn: 144216
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Benjamin Kramer authored
llvm-svn: 144194
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Duncan Sands authored
dragonegg self-host buildbot will recover (it is complaining about object files differing between different build stages). Original commit message: Add a hack to the scheduler to disable pseudo-two-address dependencies in basic blocks containing calls. This works around a problem in which these artificial dependencies can get tied up in calling seqeunce scheduling in a way that makes the graph unschedulable with the current approach of using artificial physical register dependencies for calling sequences. This fixes PR11314. llvm-svn: 144188
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Benjamin Kramer authored
llvm-svn: 144184
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Devang Patel authored
llvm-svn: 144172
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Eric Christopher authored
llvm-svn: 144169
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Jakob Stoklund Olesen authored
During the initial RPO traversal of the basic blocks, remember the ones that are incomplete because of back-edges from predecessors that haven't been visited yet. After the initial RPO, revisit all those loop headers so the incoming DomainValues on the back-edges can be properly collapsed. This will properly fix execution domains on software pipelined code, like the included test case. llvm-svn: 144151
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Jakob Stoklund Olesen authored
When merging two uncollapsed DomainValues, place a link to the active DomainValue from the passive DomainValue. This allows old stale references to the passive DomainValue to be updated to point to the active DomainValue. The new resolve() function finds the active DomainValue and updates the pointer. This change makes old live-out lists more useful since they may contain uncollapsed DomainValues that have since been merged into other DomainValues. llvm-svn: 144149
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Jakob Stoklund Olesen authored
This allows clear() to be called on a DomainValue with references. llvm-svn: 144147
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- Nov 08, 2011
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Jakob Stoklund Olesen authored
There is no need to involve the LiveRegs array and kill() any longer. llvm-svn: 144133
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Jakob Stoklund Olesen authored
No functional change. llvm-svn: 144132
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Jakob Stoklund Olesen authored
This new function will decrement the reference count, and collapse a domain value when the last reference is gone. This simplifies DomainValue reference counting, and decouples it from the LiveRegs array. llvm-svn: 144131
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Eric Christopher authored
and is different than the normal name. llvm-svn: 144130
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Dan Gohman authored
basic blocks containing calls. This works around a problem in which these artificial dependencies can get tied up in calling seqeunce scheduling in a way that makes the graph unschedulable with the current approach of using artificial physical register dependencies for calling sequences. This fixes PR11314. llvm-svn: 144124
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Jakob Stoklund Olesen authored
The old value may still be referenced by some live-out list, and we don't wan't to collapse those instructions twice. This fixes the "Can only swizzle VMOVD" assertion in some armv7 SPEC builds. <rdar://problem/10413292> llvm-svn: 144117
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Eric Christopher authored
llvm-svn: 144105
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Lang Hames authored
Add support for trimming constants to GetDemandedBits. This fixes some funky constant generation that occurs when stores are expanded for targets that don't support unaligned stores natively. llvm-svn: 144102
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Pete Cooper authored
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses llvm-svn: 144100
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Eric Christopher authored
llvm-svn: 144099
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Eric Christopher authored
llvm-svn: 144095
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