Skip to content
  1. Jul 09, 2009
  2. Jul 06, 2009
  3. Jul 01, 2009
  4. Jun 27, 2009
    • Chris Lattner's avatar
      cce1589e
    • Chris Lattner's avatar
      Reimplement rip-relative addressing in the X86-64 backend. The new · fea81da4
      Chris Lattner authored
      implementation primarily differs from the former in that the asmprinter
      doesn't make a zillion decisions about whether or not something will be
      RIP relative or not.  Instead, those decisions are made by isel lowering
      and propagated through to the asm printer.  To achieve this, we:
      
      1. Represent RIP relative addresses by setting the base of the X86 addr
         mode to X86::RIP.
      2. When ISel Lowering decides that it is safe to use RIP, it lowers to
         X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
         X86ISD::Wrapper as before.
      3. This removes isRIPRel from X86ISelAddressMode, representing it with
         a basereg of RIP instead.
      4. The addressing mode matching logic in isel is greatly simplified.
      5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
         passed through various printoperand routines is gone now.
      6. The various symbol printing routines in asmprinter now no longer infer
         when to emit (%rip), they just print the symbol.
      
      I think this is a big improvement over the previous situation.  It does have
      two small caveats though: 1. I implemented a horrible "no-rip" modifier for
      the inline asm "P" constraint modifier.  This is a short term hack, there is
      a much better, but more involved, solution.  2. I had to xfail an 
      -aggressive-remat testcase because it isn't handling the use of RIP in the
      constant-pool reading instruction.  This specific test is easy to fix without
      -aggressive-remat, which I intend to do next.
      
      llvm-svn: 74372
      fea81da4
  5. Jun 24, 2009
  6. Jun 16, 2009
  7. Jun 11, 2009
    • Bruno Cardoso Lopes's avatar
      Support for ELF Visibility · 1656366e
      Bruno Cardoso Lopes authored
      Emission for globals, using the correct data sections
      Function alignment can be computed for each target using TargetELFWriterInfo
      Some small fixes
      
      llvm-svn: 73201
      1656366e
  8. Jun 06, 2009
  9. Jun 03, 2009
  10. Jun 01, 2009
  11. May 30, 2009
  12. Apr 30, 2009
  13. Apr 29, 2009
    • Bill Wendling's avatar
      Second attempt: · 084669a1
      Bill Wendling authored
      Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
      use the old behavior, the flag is -O0. This change allows for finer-grained
      control over which optimizations are run at different -O levels.
      
      Most of this work was pretty mechanical. The majority of the fixes came from
      verifying that a "fast" variable wasn't used anymore. The JIT still uses a
      "Fast" flag. I'll change the JIT with a follow-up patch.
      
      llvm-svn: 70343
      084669a1
  14. Apr 28, 2009
  15. Mar 25, 2009
  16. Feb 24, 2009
  17. Feb 07, 2009
  18. Nov 28, 2008
  19. Nov 12, 2008
  20. Oct 25, 2008
    • Dan Gohman's avatar
      Move the code that adds the DeadMachineInstructionElimPass from · 19145317
      Dan Gohman authored
      target-independent code to target-specific code. This prevents it
      from running on targets that aren't using fast-isel.
      
      In addition to saving compile time, this addresses the problem
      that not all targets are prepared for it. In order to use this
      pass, all instructions must declare all their fixed uses and
      defs of physical registers.
      
      llvm-svn: 58144
      19145317
  21. Oct 18, 2008
    • Dan Gohman's avatar
      Teach DAGCombine to fold constant offsets into GlobalAddress nodes, · 2fe6bee5
      Dan Gohman authored
      and add a TargetLowering hook for it to use to determine when this
      is legal (i.e. not in PIC mode, etc.)
      
      This allows instruction selection to emit folded constant offsets
      in more cases, such as the included testcase, eliminating the need
      for explicit arithmetic instructions.
      
      This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
      that attempted to achieve the same effect, but wasn't as effective.
      
      Also, fix handling of offsets in GlobalAddressSDNodes in several
      places, including changing GlobalAddressSDNode's offset from
      int to int64_t.
      
      The Mips, Alpha, Sparc, and CellSPU targets appear to be
      unaware of GlobalAddress offsets currently, so set the hook to
      false on those targets.
      
      llvm-svn: 57748
      2fe6bee5
  22. Oct 14, 2008
  23. Sep 26, 2008
    • Dan Gohman's avatar
      Factor out the code for determining when symblic addresses · 007a6bb9
      Dan Gohman authored
      require RIP-relative addressing and use it to fix a bug
      in X86FastISel in x86-64 PIC mode, where it was trying to
      use base/index registers with RIP-relative addresses. This
      fixes a bunch of x86-64 testsuite failures.
      
      llvm-svn: 56676
      007a6bb9
  24. Sep 25, 2008
  25. Aug 21, 2008
  26. Aug 17, 2008
  27. Aug 12, 2008
  28. Jul 09, 2008
  29. Jun 22, 2008
  30. May 23, 2008
  31. May 13, 2008
Loading