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  1. Jul 06, 2012
    • Alexey Samsonov's avatar
      Fix PR13202 and a regtest. · 39602781
      Alexey Samsonov authored
      DwarfDebug class could generate the same (inlined) DIVariable twice:
      1) when trying to find abstract debug variable for a concrete inlined instance.
      2) when explicitly collecting info for variables that were optimized out.
      
      This change makes sure that this duplication won't happen and makes
      Clang pass "gdb.opt/inline-locals" test from gdb testsuite.
      
      Reviewed by Eric Christopher.
      
      llvm-svn: 159811
      39602781
    • Jakob Stoklund Olesen's avatar
      Add some comments suggested in code review. · 3f1bb93c
      Jakob Stoklund Olesen authored
      llvm-svn: 159800
      3f1bb93c
  2. Jul 05, 2012
    • Chandler Carruth's avatar
      Optimize extendIntervalEndTo a tiny bit by saving one call through the · 10886764
      Chandler Carruth authored
      vector erase. No functionality changed.
      
      llvm-svn: 159746
      10886764
    • Chandler Carruth's avatar
      Finish fixing the MachineOperand hashing, providing a nice modern · 264854f9
      Chandler Carruth authored
      hash_value overload for MachineOperands. This addresses a FIXME
      sufficient for me to remove it, and cleans up the code nicely too.
      
      The important changes to the hashing logic:
      - TargetFlags are now included in all of the hashes. These were complete
        missed.
      - Register operands have their subregisters and whether they are a def
        included in the hash.
      - We now actually hash all of the operand types. Previously, many
        operand types were simply *dropped on the floor*. For example:
        - Floating point immediates
        - Large integer immediates (>64-bit)
        - External globals!
        - Register masks
        - Metadata operands
      - It removes the offset from the block-address hash; I'm a bit
        suspicious of this, but isIdenticalTo doesn't consider the offset for
        black addresses.
      
      Any patterns involving these entities could have triggered extreme
      slowdowns in MachineCSE or PHIElimination. Let me know if there are PRs
      you think might be closed now... I'm looking myself, but I may miss
      them.
      
      llvm-svn: 159743
      264854f9
    • Duncan Sands's avatar
      All cases are covered, no need for a default. This deals with the · 71dacd09
      Duncan Sands authored
      corresponding clang warning.
      
      llvm-svn: 159742
      71dacd09
    • Chandler Carruth's avatar
      The hash function for MI expressions, used by MachineCSE, is really · 1d5d2310
      Chandler Carruth authored
      broken. This patch fixes the superficial problems which lead to the
      intractably slow compile times reported in PR13225.
      
      The specific issue is that we were failing to include the *offset* of
      a global variable in the hash code. Oops. This would in turn cause all
      MIs which were only distinguishable due to operating on different
      offsets of a global variable to produce identical hash functions. In
      some of the test cases attached to the PR I saw hash table activity
      where there were O(1000) probes-per-lookup *on average*. A very few
      entries were responsible for most of these probes.
      
      There is still quite a bit more to do here. The ad-hoc layering of data
      in MachineOperands makes them *extremely* brittle to hash correctly.
      We're missing quite a few other cases, the only ones I've fixed here are
      the specific MO types which were allowed through the assert() in
      getOffset().
      
      llvm-svn: 159741
      1d5d2310
    • Duncan Sands's avatar
      Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1 · 0552a2ca
      Duncan Sands authored
      booleans.  Patch by James Benton.
      
      llvm-svn: 159739
      0552a2ca
    • Nick Lewycky's avatar
      Remove ParentMap. You can just ask the domnode for its parent. No functionality · 765c6993
      Nick Lewycky authored
      change.
      
      Move the "Not profitable, avoid CSE!" debug message next to where we fail the
      check for profitability and use a different message for avoiding CSE due to
      being in different register classes.
      
      llvm-svn: 159729
      765c6993
    • Jakob Stoklund Olesen's avatar
      Allow trailing physreg RegisterSDNode operands on non-variadic instructions. · c300ef0e
      Jakob Stoklund Olesen authored
      Also allow trailing register mask operands on non-variadic both
      MachineSDNodes and MachineInstrs.
      
      The extra physreg RegisterSDNode operands are added to the MI as
      <imp-use> operands. This makes it possible to have non-variadic call
      instructions.
      
      Call and return instructions really are non-variadic, the argument
      registers should only be used implicitly - they are not part of the
      encoding.
      
      llvm-svn: 159727
      c300ef0e
    • Jakob Stoklund Olesen's avatar
      Print SlotIndexes when available for -print-machineinstrs. · adb50a7a
      Jakob Stoklund Olesen authored
      llvm-svn: 159726
      adb50a7a
  3. Jul 04, 2012
  4. Jul 03, 2012
  5. Jul 02, 2012
  6. Jul 01, 2012
  7. Jun 30, 2012
  8. Jun 29, 2012
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