isn't cluttered with things like "Llabel47:Llabel48:  movq  (%rsi), %xmm3"

llvm-svn: 90638

llvm-svn: 90637

instead of SelectionDAGISel.cpp.

llvm-svn: 90636

MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634

llvm-svn: 90633

and that Instruction only. Implement this by setting the "current debug position"
back to Unknown after processing each instruction.

llvm-svn: 90632

Don't print "SrcLine"; just print the filename and line number, which
is obvious enough and more informative.

llvm-svn: 90631

the column number if it is not known. Handle the case of a missing filename
better.

llvm-svn: 90630

Remove an unneeded include.

llvm-svn: 90625

llvm-svn: 90621

llvm-svn: 90617

Use new interfaces to print spill size.

llvm-svn: 90611

Have hasLoad/StoreFrom/ToStackSlot return the relevant MachineMemOperand.

llvm-svn: 90608

llvm-svn: 90603

llvm-svn: 90601

llvm-svn: 90588

llvm-svn: 90581

llvm-svn: 90575

llvm-svn: 90572

llvm-svn: 90567

llvm-svn: 90566

architectures that LLVM targets, because they don't use this code.

llvm-svn: 90564

llvm-svn: 90557

llvm-svn: 90553

folding a load from constant.

llvm-svn: 90545

llvm-svn: 90539

gvn (this is just a skeleton so far).  This will ultimately be used
to fix a nasty miscompilation with GVN.

llvm-svn: 90518

Teach AsmWriter to write inline (not via a global metadata slot) metadata that contains an instruction

llvm-svn: 90512

llvm-svn: 90511

a compile time perf optimization to avoid a load.

llvm-svn: 90507

The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.

The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.

This patch takes care of a few more cases that r90163 missed.

llvm-svn: 90502

- If the reaching definition is an undef and the use is a PHI, add the implicit_def to the end of the source block.
- When reaching value is replaced with another, update the cache as well.

llvm-svn: 90501

Insert composite type DIE into the map before processing type fields. This allows fields to find their context DIE from the map.

llvm-svn: 90498

Add ParseInlineMetadata() which can parses metadata that refers to an instruction.  Extend ParseParameterList() to use this new function so that calls to llvm.dbg.declare can pass inline metadata

llvm-svn: 90497

llvm-svn: 90490

llvm-svn: 90489

llvm-svn: 90488

llvm-svn: 90487

Pointed out by Javier Martinez (who also provided a patch).  Since
this logic is not used on (for example) x86, I guess nobody noticed.
Tested by generating SHL, SRL, SRA on various choices of i64 for all
possible shift amounts, and comparing with gcc.  Since I did this on
x86-32, I had to force the use of ExpandShiftWithUnknownAmountBit.
What I'm saying here is that I don't have a testcase I can add to the
repository.

llvm-svn: 90482

llvm-svn: 90481