Commits · 3adf88b74627b2fa7256fdff2647a840470fc9a5 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Apr 18, 2018
- [RISCV] Expand codegen -> compression sanity checks and move to a single file · c0464d92
  Alex Bradbury authored Apr 18, 2018
  c0464d92
Apr 06, 2018
- [RISCV] Tablegen-driven Instruction Compression. · c1b0e66b
  Sameer AbuAsal authored Apr 06, 2018
  c1b0e66b
Jan 18, 2018
- [RISCV] Implement frame pointer elimination · 7d6aa1f7
  Alex Bradbury authored Jan 18, 2018
  7d6aa1f7
Jan 10, 2018
- [RISCV] Implement branch analysis · e027c93a
  Alex Bradbury authored Jan 10, 2018
  e027c93a
Dec 15, 2017
- [RISCV] Enable emission of alias instructions by default · 59136ffa
  Alex Bradbury authored Dec 15, 2017
  59136ffa
Dec 11, 2017
- [RISCV] Implement prolog and epilog insertion · b014e3de
  Alex Bradbury authored Dec 11, 2017
  b014e3de
Dec 04, 2017
- [CodeGen] Unify MBB reference format in both MIR and debug output · 25528d6d
  Francis Visoiu Mistrih authored Dec 04, 2017
  25528d6d
Nov 08, 2017
- [RISCV] Codegen for conditional branches · 74913e1c
  Alex Bradbury authored Nov 08, 2017
  74913e1c