- Jun 14, 2011
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Rafael Espindola authored
llvm-svn: 132995
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Rafael Espindola authored
llvm-svn: 132988
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Nadav Rotem authored
Add a testcase for checking the integer-promotion of many different vector types (with power of two types such as 8,16,32 .. 512). Fix a bug in the integer promotion of bitcast nodes. Enable integer expanding only if the target of the conversion is an integer (when the type action is scalarize). Add handling to the legalization of vector load/store in cases where the saved vector is integer-promoted. llvm-svn: 132985
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Nadav Rotem authored
llvm-svn: 132984
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Cameron Zwarich authored
llvm-svn: 132982
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Rafael Espindola authored
AnalyzeBranch. llvm-svn: 132981
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Bruno Cardoso Lopes authored
or instruction cache access. Update the targets to match it and also teach autoupgrade. llvm-svn: 132976
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Rafael Espindola authored
sharp all or nothing transition when one extra predecessor was added. Now we still test first ones for merging. llvm-svn: 132974
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Nick Lewycky authored
llvm-svn: 132964
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John McCall authored
line info correctly. llvm-svn: 132961
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Nick Lewycky authored
llvm-svn: 132954
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Cameron Zwarich authored
llvm-svn: 132952
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Jim Grosbach authored
llvm-svn: 132946
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- Jun 13, 2011
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Cameron Zwarich authored
llvm-svn: 132940
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Cameron Zwarich authored
llvm-svn: 132939
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Cameron Zwarich authored
llvm-svn: 132938
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Cameron Zwarich authored
spartan right now, but I plan to encode more information in this enum to improve the correctness and reliability of SRoA. At least this first pass makes it possible to make VectorTy an actual VectorType. llvm-svn: 132937
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Cameron Zwarich authored
llvm-svn: 132936
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Jim Grosbach authored
The logic for reserving R4 for use as a scratch needs to match that for actually using it. Also, it's not necessary for immediate <=508, so adjust the value checked. llvm-svn: 132934
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Evan Cheng authored
Aliased flag options should be directed to stdout, not stderr to be consistent. Patch by Julien Lerouge. llvm-svn: 132931
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Stuart Hastings authored
might overflow. Re-typing the alloca to a larger type (e.g. double) hoists a shift into the alloca, potentially exposing overflow in the expression. rdar://problem/9265821 llvm-svn: 132926
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Benjamin Kramer authored
llvm-svn: 132925
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Nadav Rotem authored
only if the number of packed elements is a power of two. Bug found in Duncan's testcase. llvm-svn: 132923
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Benjamin Kramer authored
The backend already knew this trick. llvm-svn: 132915
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Benjamin Kramer authored
llvm-svn: 132914
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Michael J. Spencer authored
llvm-svn: 132913
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Michael J. Spencer authored
llvm-svn: 132911
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Michael J. Spencer authored
llvm-svn: 132910
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Michael J. Spencer authored
llvm-svn: 132909
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Michael J. Spencer authored
llvm-svn: 132908
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Nick Lewycky authored
intrinsics. In fact, we'll optimize a bitcast to that when possible. Detect it when looking for the lifetime intrinsics. No test case, noticed by inspection. llvm-svn: 132906
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Jakob Stoklund Olesen authored
In particular, don't spill dirty registers only to satisfy a hint. It is not worth it. The attached test case provides an example where the fast allocator would spill a register when other registers are available. llvm-svn: 132900
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Jakob Stoklund Olesen authored
llvm-svn: 132899
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Rafael Espindola authored
having. llvm-svn: 132898
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Benjamin Kramer authored
InstCombine: Shrink ((zext X) & C1) == C2 to fold away the cast if the "zext" and the "and" have one use. llvm-svn: 132897
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Benjamin Kramer authored
llvm-svn: 132896
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- Jun 12, 2011
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Nadav Rotem authored
types such as i33 were rounded to i32. Originated from Duncan's testcase. llvm-svn: 132893
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Nadav Rotem authored
Instead of scalarizing, and doing an element-by-element truncat, use vector truncate. Add support for scalarization of vectors: i8 -> <1 x i1> (from Duncan's testcase). llvm-svn: 132892
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Rafael Espindola authored
Add a triple to the tests. llvm-svn: 132885
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