llvm-svn: 126934

llvm-svn: 126862

      missing patterns for them.

      Add a SIMD test subdirectory to hold tests for SIMD instruction
      selection correctness and quality.
'

llvm-svn: 126845

llvm-svn: 126780

llvm-svn: 126682

[AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bit
      and 256-bit forms.  Because the number of elements in a vector
      does not determine the vector type (4 elements could be v4f32 or
      v4f64), pass the full type of the vector to decode routines.

llvm-svn: 126664

llvm-svn: 126578

Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/reload frames" for XMMs.

It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs).

llvm-svn: 126568

llvm-svn: 126518

llvm-svn: 126488

llvm-svn: 126441

Patch by Nathan Jeffords!

llvm-svn: 126425

operands starts at index 2, not 1.
rdar://9045024
PR9305

llvm-svn: 126359

[AVX] General VUNPCKL codegen support.

llvm-svn: 126264

llvm-svn: 126244

llvm-svn: 126226

From Dimitry Andric.

llvm-svn: 126168

Patch by Jai Menon.

llvm-svn: 126165

In other words, do not keep track of argument's location.  The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working. 
 - The debugger needs to be aware of prolog_end attribute attached with line table entries.
 - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)

llvm-svn: 126155

X86 instruction decode structure was being interpreted as
being in units of bits, although it is actually stored in
units of bytes.

llvm-svn: 126147

llvm-svn: 126130

but which is responsible for us doing really bad things to 256.bzip2.

llvm-svn: 126126

"dllimport" function must not be GlobalVariable, but Function. It is enough to check with GlobalValue.
test/CodeGen/X86/dll-linkage.ll is updated to check llc -O0.

llvm-svn: 126110

on Core 2 and Nehalem, so the code we generate is better than GCC's here.

llvm-svn: 126100

of a constant had a minor typo introduced when copying it from the book, which
caused it to favor negative approximations over positive approximations in many
cases. Positive approximations require fewer operations beyond the multiplication.

In the case of division by 3, we still generate code that is a single instruction
larger than GCC's code.

llvm-svn: 126097

since one needs to be a register operand. Just use movss instead of forcing
an operand into a register.

Fixes PR9239

llvm-svn: 126072

of testing for its presence at cmake time.

This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.

llvm-svn: 126068

llvm-svn: 126054

This is reasonable to do since all bt-mem forms do the
same thing.

llvm-svn: 126047

llvm-svn: 126018

llvm-svn: 125832

llvm-svn: 125805

Validate encoding of leave in 64bit mode.

llvm-svn: 125795

[AVX] Recorganize X86ShuffleDecode into its own library
(LLVMX86Utils.a) to break cyclic library dependencies between
LLVMX86CodeGen.a and LLVMX86AsmParser.a.  Previously this code was in
a header file and marked static but AVX requires some additional
functionality here that won't be used by all clients.  Since including
unused static functions causes a gcc compiler warning, keeping it as a
header would break builds that use -Werror.  Putting this in its own
library solves both problems at once.

llvm-svn: 125765

these patterns.

llvm-svn: 125759

No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. In llvm side, i686 and x64 can be treated as similar way.

llvm-svn: 125747

llvm-svn: 125746

other getNode() methods.  Radar 9002173.

llvm-svn: 125665

have their low bits set to zero.  This allows us to optimize
out explicit stack alignment code like in stack-align.ll:test4 when
it is redundant.

Doing this causes the code generator to start turning FI+cst into
FI|cst all over the place, which is general goodness (that is the
canonical form) except that various pieces of the code generator
don't handle OR aggressively.  Fix this by introducing a new
SelectionDAG::isBaseWithConstantOffset predicate, and using it
in places that are looking for ADD(X,CST).  The ARM backend in
particular was missing a lot of addressing mode folding opportunities
around OR.

llvm-svn: 125470

These are just FXSAVE and FXRSTOR with REX.W prefixes.  These versions use
64-bit pointer values instead of 32-bit pointer values in the memory map they
dump and restore.

llvm-svn: 125446