llvm-svn: 132193

These should be DW_OP_bit_piece of CR (64).

llvm-svn: 132192

llvm-svn: 132190

- Flip order of bitfields. This gets our output matching GAS.
- Handle case where the end of the prolog wasn't specified.
- If the resulting unwind info struct is less than 8 bytes, pad to 8 bytes.

Add a test for the latter two.

llvm-svn: 132188

refer to them.

I tested this with both check-all and the gdb testsuite.

llvm-svn: 132187

InstCombine: Make switch folding with equality compares more aggressive by trying instsimplify on the arm where we know the compared value.

Stuff like "x == y ? y : x&y" now folds into "x&y".

llvm-svn: 132185

llvm-svn: 132181

followed by a conditional and imm8.

llvm-svn: 132179

llvm-svn: 132178

Use them to calculate the offset inside the prolog. Emit this value when
emitting the unwind codes.

llvm-svn: 132177

to 4 bytes.

I'm surprised no one caught the missing break statements.

llvm-svn: 132176

still report leaks, but they're spurious now. Valgrind cannot peer into
std::vector objects--or any dynamic array, for that matter--because it doesn't
know how big the array is.

llvm-svn: 132174

already defined, and err when the PushMachFrame operation isn't the first
operation (if specified at all).

llvm-svn: 132173

One more debug line number miss in instcombine (although the code in question isn't actually in instcombine).

llvm-svn: 132170

Final step of instcombine debuginfo; switch a couple more places over to InsertNewInstWith, and use setDebugLoc for the cases which can't be easily handled by the automated mechanisms.

llvm-svn: 132167

This looks like it flagged an actual bug. Devang, please review. I added
the parentheses that change behavior, but make the behavior more closely
match commit log's intent.

llvm-svn: 132165

llvm-svn: 132164

crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].

llvm-svn: 132163

llvm-svn: 132161

If llvm.dbg.value and the value instruction it refers to are far apart then iSel may not be able to find corresponding Node for llvm.dbg.value during DAG construction. Make iSel's life easier by removing this distance between llvm.dbg.value and its value instruction.

llvm-svn: 132151

llvm-svn: 132149

llvm-svn: 132148

a function has any function calls.

llvm-svn: 132140

llvm-svn: 132136

llvm-svn: 132132

llvm-svn: 132131

llvm-svn: 132128

llvm-svn: 132127

assert that prevented setting alignment on section creation.

llvm-svn: 132113

llvm-svn: 132111

llvm-svn: 132108

llvm-svn: 132107

Rework how the MCWin64EHUnwindInfo instances are stored. Fix issues with
chained unwind areas exposed by the test that were related to this.

The ChainedParent field had the wrong address, because when the chained unwind
info was added, the addresses shifted around. Now we store the pointers to the
structures, which are now allocated from the MC heap.

llvm-svn: 132106

rdar://problem/6920088

llvm-svn: 132105

Use a proper worklist for use-def traversal without holding onto an
iterator. Now that we process all IV uses, we need complete logic for
resusing existing derived IV defs. See HoistStep.

llvm-svn: 132103

This doesn't change functionality (much), but it allows for a more fine-grained
eviction policy. The current policy only compares spill weights, and that is not
always the best thing to do.  Spill weights are designed to serve linear scan,
and they don't consider live range splitting.

Add a mechanism so canEvict() can request that a live range be evicted and
split/spilled. This is to avoid infinite eviction loops.

llvm-svn: 132101

Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.

The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .

llvm-svn: 132099

llvm-svn: 132098

llvm-svn: 132097

llvm-svn: 132087