Commits · 3cb3b0045c62bc6cc3ef377144c433a796d48405 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Aug 01, 2012
- Added FMA functionality to X86 target. · 3cb3b004
  Elena Demikhovsky authored Aug 01, 2012
  3cb3b004
Jul 31, 2012
- Conform to LLVM coding style. · b67d7a3a
  Micah Villmow authored Jul 31, 2012
  b67d7a3a
- Don't generate ordered or unordered comparison operations if it is not legal to do so. · 6b12f596
  Micah Villmow authored Jul 31, 2012
  6b12f596
Jul 30, 2012
- Consider address spaces for hashing and CSEing DAG nodes. Otherwise two loads... · 91244268
  Pete Cooper authored Jul 30, 2012
  91244268
Jul 26, 2012
- Add a floor intrinsic. · 0b3d7829
  Dan Gohman authored Jul 26, 2012
  0b3d7829
Jul 24, 2012
- Change llvm_unreachable in SplitVectorOperand to report_fatal_error. Keeps... · 17300940
  Craig Topper authored Jul 24, 2012
  17300940
Jul 23, 2012
- Fix a typo (the the => the) · 35521e23
  Sylvestre Ledru authored Jul 23, 2012
  35521e23
- Fixed DAGCombine optimizations which generate select_cc for targets · 9056076c
  Nadav Rotem authored Jul 23, 2012
  9056076c
- Tidy up. Fix indentation and remove trailing whitespace. · 2694c05e
  Craig Topper authored Jul 23, 2012
  2694c05e
- Change llvm_unreachable in SplitVectorResult to report_fatal_error. Keeps... · b49546a3
  Craig Topper authored Jul 23, 2012
  b49546a3
Jul 19, 2012
- Replace some explicit compare loops with std::equal. · f364a63c
  Benjamin Kramer authored Jul 19, 2012
  f364a63c
- Fixed few warnings. · aaf97359
  Galina Kistanova authored Jul 19, 2012
  aaf97359
- Remove tabs. · d163405d
  Bill Wendling authored Jul 19, 2012
  d163405d
Jul 18, 2012
- ignore 'invoke @llvm.donothing', but still keep the edge to the continuation BB · 2151497d
  Nuno Lopes authored Jul 18, 2012
  2151497d
Jul 17, 2012
- Back out r160101 and instead implement a dag combine to recover from instcombine transformation. · e6a3b03e
  Evan Cheng authored Jul 17, 2012
  e6a3b03e
- Remove unused variable. · 7c1598ca
  Benjamin Kramer authored Jul 17, 2012
  7c1598ca
- Fix a crash in the legalization of large vectors. · 277a40bc
  Nadav Rotem authored Jul 17, 2012
  277a40bc
- Implement r160312 as target indepedenet dag combine. · 780f9b5f
  Evan Cheng authored Jul 17, 2012
  780f9b5f
- Make sure constant bitwidth is <= 64 bit before calling getSExtValue(). · 47d7be95
  Evan Cheng authored Jul 17, 2012
  47d7be95
- This is another case where instcombine demanded bits optimization created · f579beca
  Evan Cheng authored Jul 17, 2012
  f579beca
Jul 16, 2012
- Minor cleanup and docs. · 60f7904d
  Nadav Rotem authored Jul 16, 2012
  60f7904d
- · 839a06e9
  Nadav Rotem authored Jul 16, 2012
  839a06e9
Jul 15, 2012
- Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be... · 3050e071
  Nadav Rotem authored Jul 15, 2012
  3050e071
- Refactor the code that checks that all operands of a node are UNDEFs. · a62368c9
  Nadav Rotem authored Jul 15, 2012
  a62368c9
Jul 14, 2012
- Add a dagcombine optimization to convert concat_vectors of undefs into a single undef. · 01892100
  Nadav Rotem authored Jul 14, 2012
  01892100
Jul 13, 2012
- Provide function name in 'Cannot select' fatal error. · 1af8c806
  Jim Grosbach authored Jul 13, 2012
  1af8c806
Jul 12, 2012
- The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type of · 671cc257
  Duncan Sands authored Jul 12, 2012
  671cc257
Jul 11, 2012
- InstrEmitter::EmitSubregNode() optimize extract_subreg in this case: · b1712285
  Evan Cheng authored Jul 11, 2012
  b1712285
- Rename many of the Tmp1, Tmp2, Tmp3 variables to names such as Chain, Value, Ptr, etc. · 2a148668
  Nadav Rotem authored Jul 11, 2012
  2a148668
- Remove unused variable. · 9488100d
  Benjamin Kramer authored Jul 11, 2012
  9488100d
- Refactor the DAG Legalizer by extracting the legalization of · de6fd282
  Nadav Rotem authored Jul 11, 2012
  de6fd282
- Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns an... · b8844d67
  Owen Anderson authored Jul 11, 2012
  b8844d67
Jul 10, 2012
- · d908ddc1
  Nadav Rotem authored Jul 10, 2012
  d908ddc1
Jul 09, 2012
- Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional move,... · d4b841f8
  Owen Anderson authored Jul 09, 2012
  d4b841f8
Jul 07, 2012
- I'm introducing a new machine model to simultaneously allow simple · 87255e34
  Andrew Trick authored Jul 07, 2012
  87255e34
Jul 06, 2012
- Whitespace. · 879c34f4
  Chad Rosier authored Jul 06, 2012
  879c34f4
- [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic. · 88d53eae
  Chad Rosier authored Jul 06, 2012
  88d53eae
Jul 05, 2012
- All cases are covered, no need for a default. This deals with the · 71dacd09
  Duncan Sands authored Jul 05, 2012
  71dacd09
- Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1 · 0552a2ca
  Duncan Sands authored Jul 05, 2012
  0552a2ca
- Allow trailing physreg RegisterSDNode operands on non-variadic instructions. · c300ef0e
  Jakob Stoklund Olesen authored Jul 04, 2012
  c300ef0e