llvm-svn: 41863

llvm-svn: 41862

access to bits).  Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling 
(untested, probably does not work).

llvm-svn: 41858

information for EH.

llvm-svn: 41852

init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841

llvm-svn: 41840

that global stub instead of doing the ".set" thingy we were doing before.

llvm-svn: 41838

llvm-svn: 41810

llvm-svn: 41808

instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.

llvm-svn: 41802

registers. The scheduler is now responsible for emitting them.

llvm-svn: 41781

by flagging the associated instructions as being trivially rematerializable.

llvm-svn: 41775

llvm-svn: 41774

The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.

llvm-svn: 41768

Patch by Sterling Stein!

llvm-svn: 41758

Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double.  Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)

llvm-svn: 41747

leal    (,%rcx,8), %rcx
It should be
leal    (,%rcx,8), %ecx

llvm-svn: 41735

llvm-svn: 41700

llvm-svn: 41680

llvm-svn: 41643

This is mandated table 3.1 at
http://www.x86-64.org/documentation/abi.pdf

llvm-svn: 41642

Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.

llvm-svn: 41632

Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses.

llvm-svn: 41599

llvm-svn: 41595

Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.

llvm-svn: 41587

in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.

llvm-svn: 41577

llvm-svn: 41502

Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)

llvm-svn: 41479

changing the interface to allow for future changes.

llvm-svn: 41384

llvm-svn: 41359

llvm-svn: 41319

llvm-svn: 41284

llvm-svn: 41208

 *) The needed information is propagated to the DAG
 *) The X86-64 backend detects it and aborts

llvm-svn: 41179

llvm-svn: 41178

hard to catch bugs with retaddr lowering

llvm-svn: 41104

llvm-svn: 41103

llvm-svn: 41059

see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.

llvm-svn: 41049

llvm-svn: 41048