This works around a limitation in gdb which is reported by following inherit.exp test failures from gdb testsuite.

gdb.cp/inherit.exp: print g_vB.vB::vb
gdb.cp/inherit.exp: print g_vB.vB::vx
gdb.cp/inherit.exp: print g_vC.vC::vc
gdb.cp/inherit.exp: print g_vC.vC::vx
gdb.cp/inherit.exp: print g_vD.vB::vb
...

llvm-svn: 130702

This automagically provides a transform noticed by my super-optimizer
as occurring quite often: "rem x, (select cond, x, 1)" -> 0.

llvm-svn: 130694

llvm-svn: 130693

llvm-svn: 130692

llvm-svn: 130691

llvm-svn: 130690

When an interfering live range ends at a dead slot index between two
instructions, make sure that the inserted copy instruction gets a slot index
after the dead ones. This makes it possible to avoid the interference.

Ideally, there shouldn't be interference ending at a deleted instruction, but
physical register coalescing can sometimes do that to sub-registers.

This fixes PR9823.

llvm-svn: 130687

comments claimed it did this, but the LHS value was actually an unused variable.

The new system considers only the '-foo' part when comparing it for typos
against flags that have values, but still look at the whole string for flags
that don't. That way, we'll still correct '-inst=combine' to '-instcombine'.

llvm-svn: 130685

to scope a variable more tightly per llvm coding style. No functional change.

llvm-svn: 130684

problem reported on cfe-dev.

llvm-svn: 130661

llvm-svn: 130658

Windows/DynamicLibrary.inc: Clean up ELM_Callback. We may check the decl instead of the versions of individual libraries.

autoconf: Add checking ELM_Callback decl for mingw32 and mingw-w64.
cmake/config-ix.cmake: Add checking ELM_Callback decl for win32.

llvm-svn: 130657

likely a result of copy/paste.

llvm-svn: 130640

-fno-dwarf2-cfi-asm. Implement the same behavior.

llvm-svn: 130637

llvm-svn: 130635

for all symbol differences and can drop the old EmitPCRelSymbolValue
method.

This also make getExprForFDESymbol on ELF equal to the one on MachO, and it
can be made non-virtual.

llvm-svn: 130634

less agressive about disabling cfi on linux :-(

llvm-svn: 130626

after folding ADD32ri to ADD32mi, so don't do that.

This only happens when the greedy register allocator gets itself in trouble and
spills %vreg9 here:

16L             %vreg9<def> = MOVPC32r 0, %ESP<imp-use>; GR32:%vreg9
48L             %vreg9<def> = ADD32ri %vreg9, <es:_GLOBAL_OFFSET_TABLE_>[TF=1], %EFLAGS<imp-def,dead>; GR32:%vreg9

That should never happen, the live range should be split instead.

llvm-svn: 130625

Currently the output should be almost identical to the one produced by CodeGen
to make the transition easier.

The only two differences I know of are:

* Some files get an extra advance loc of size 0. This will be fixed when
relaxations are enabled.
* The optimization of declaring an EH symbol as an external variable is not
implemented. This is a subset of adding the nounwind attribute, so we if really
this at -O0 we should probably do it at the IL level.

llvm-svn: 130623

range covers the entire block.

The live range can't be terminated at a random instruction.

llvm-svn: 130619

This obviously helps a lot if the division would be turned into a libcall
(think i64 udiv on i386), but div is also one of the few remaining instructions
on modern CPUs that become more expensive when the bitwidth gets bigger.

This also helps register pressure on i386 when dividing chars, divb needs
two 8-bit parts of a 16 bit register as input where divl uses two registers.

int foo(unsigned char a) { return a/10; }
int bar(unsigned char a, unsigned char b) { return a/b; }

compiles into (x86_64)
_foo:
  imull $205, %edi, %eax
  shrl  $11, %eax
  ret
_bar:
  movzbl        %dil, %eax
  divb  %sil, %al
  movzbl        %al, %eax
  ret

llvm-svn: 130615

This folds away silly stuff like (a&255)/1000 -> 0.

llvm-svn: 130614

is a bit ugly, but doing it on the base MCStreamer would be redundant
with the object streamer which does it using SD.

llvm-svn: 130611

llvm-svn: 130609

This could happen when trying to use a value that had been eliminated after dead
code elimination and folding loads.

llvm-svn: 130597

llvm-svn: 130596

the final assembly. It is the same technique used when targeting
assemblers that don't support .loc.

llvm-svn: 130587

llvm-svn: 130585

llvm-svn: 130582

llvm-svn: 130568

llvm-svn: 130562

Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM.  Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.

llvm-svn: 130560

llvm-svn: 130558

llvm-svn: 130557

llvm-svn: 130552

llvm-svn: 130551

if it ever did it needs the def machinery.

llvm-svn: 130549

llvm-svn: 130546

lets this code be used when producing assembly code for old assemblers without
uleb support.

llvm-svn: 130544

llvm-svn: 130543