llvm-svn: 96065

MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.

llvm-svn: 96064

llvm-svn: 96063

Use that while fixing a nasty misuse of qsort in vtable codegen which, somehow,
has not actually caused a crash.

llvm-svn: 96062

No functionality change.

llvm-svn: 96060

We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.

llvm-svn: 96059

fix swapgs to be spelled right.

llvm-svn: 96058

phi cycles.  Adjust a few tests to keep dead instructions from being optimized
away.  This (together with my previous change for phi cycles) fixes Apple
radar 7627077.

llvm-svn: 96057

SCEVAddRecExpr doesn't necessarily dominate blocks merely dominated
by all of its operands. This fixes an abort compiling 403.gcc.

llvm-svn: 96056

llvm-svn: 96055

llvm-svn: 96054

llvm-svn: 96052

separate LLVMContexts.

llvm-svn: 96051

encoder and decoder by using new MRM_ forms.

llvm-svn: 96048

disabled in NDEBUG builds).  The option applies only to -cc1 invocations and is:
  -disable_llvm_verifier

llvm-svn: 96046

llvm-svn: 96045

single Imported function, in preparation for fixing a serious design
flaw.

llvm-svn: 96044

whose opcodes extend into the ModR/M field using the
Form field of the instruction rather than by special
casing each instruction.  Commented out the special
casing of VMCALL, which is the first instruction to use
this special form.  While I was in the neighborhood,
added a few comments for people modifying the Intel
disassembler. 

llvm-svn: 96043

llvm-svn: 96041

rip-relative addresses, and add a testcase.

llvm-svn: 96040

The solution there produces correct code, but is seriously
deficient in several ways.

llvm-svn: 96039

llvm-svn: 96038

Patch by Shivram K!

llvm-svn: 96037

addressing.  This isn't complete because I need an MCContext
to generate new MCExprs.

llvm-svn: 96036

Make the following functions thread-safe but having them return an std::string that is reconstructed
every time they are called:

getClangRevision()
getClangFullRepositoryVersion()
getClangFullVersion()

llvm-svn: 96033

Plus add two formats: MiscFrm and ThumbMiscFrm.  Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.

llvm-svn: 96032

llvm-svn: 96031

llvm-svn: 96029

llvm-svn: 96028

llvm-svn: 96027

is pc relative or not, mark call and branches as pcrel.

llvm-svn: 96026

enumerators, along with ImplicitCastExprs to make it work.

llvm-svn: 96024

Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.

llvm-svn: 96023

llvm-svn: 96020

llvm-svn: 96019

llvm-svn: 96018

missing (in c/objc mode). Fixes radar 7528255.

llvm-svn: 96017

stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot.  Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.

SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.

Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.

llvm-svn: 96015

(2) Reformat "annotations" topics list to use a collapsable tree.

llvm-svn: 96013

in objective-c++ mode (do it for objective-c only).

llvm-svn: 96012