- Sep 25, 2013
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Peter Collingbourne authored
This should fix the MSVC build. llvm-svn: 191357
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Peter Collingbourne authored
more reliably across platforms. Patch by Tom Roeder! llvm-svn: 191343
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- Sep 24, 2013
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David Blaikie authored
llvm-svn: 191329
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Benjamin Kramer authored
This is safe per C++11 18.6.1.1p3: [operator new returns] a non-null pointer to suitably aligned storage (3.7.4), or else throw a bad_alloc exception. This requirement is binding on a replacement version of this function. Brings us a tiny bit closer to eliminating more vector push_backs. llvm-svn: 191310
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Daniel Sanders authored
llvm-svn: 191301
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Daniel Sanders authored
This required correcting the definition of the bsel and bseli intrinsics. llvm-svn: 191290
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Jiangning Liu authored
Patch by Ana Pazos. 1.Added support for v1ix and v1fx types. 2.Added Scalar Pairwise Reduce instructions. 3.Added initial implementation of Scalar Arithmetic instructions. llvm-svn: 191263
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Reid Kleckner authored
The underlying type of all plain enums in MSVC is 'int', even if the enumerator contains large 32-bit unsigned values or values greater than UINT_MAX. The only way to get a large or unsigned enum type is to request it explicitly with the C++11 strong enum types feature. However, since LLVM isn't C++11 yet, I had to add a conditional LLVM_ENUM_INT_TYPE to Compiler.h to control its usage. The motivating true positive for this change is compiling PointerIntPair with MSVC for win64. The PointerIntMask value is supposed to be pointer sized value of all ones with some low zeros. Instead, it's truncated to 32-bits! We are only saved later because it is sign extended back in the AND with int64_t, and we happen to want all ones. This silences lots of -Wmicrosoft warnings during a clang self-host targeting Windows. llvm-svn: 191241
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David Blaikie authored
llvm-svn: 191234
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David Blaikie authored
llvm-svn: 191233
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- Sep 23, 2013
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Daniel Sanders authored
Changes to MIPS SelectionDAG: * Added nodes VEXTRACT_[SZ]EXT_ELT to represent extract and extend in a single operation and implemented the DAG combines necessary to fold sign/zero extends into the extract. llvm-svn: 191199
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- Sep 22, 2013
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David Blaikie authored
llvm-svn: 191179
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David Blaikie authored
llvm-svn: 191178
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Benjamin Kramer authored
This makes using array_pod_sort significantly safer. The implementation relies on function pointer casting but that should be safe as we're dealing with void* here. llvm-svn: 191175
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- Sep 20, 2013
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Anders Waldenborg authored
This reverts r191030 llvm-svn: 191075
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Andrew Trick authored
The global registry is used to allow command line override of the scheduler selection, but does not work well as the normal selection API. For example, the same LLVM process should be able to target multiple targets or subtargets. llvm-svn: 191071
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David Blaikie authored
DebugInfo: GDBIndexEntry*String conversion functions now return const char* for easy llvm::formating This was previously invoking UB by passing a user-defined type to format. Thanks to Jordan Rose for pointing this out. llvm-svn: 191060
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Richard Mitton authored
llvm-svn: 191053
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Richard Mitton authored
llvm-svn: 191052
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David Blaikie authored
llvm-svn: 191050
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David Blaikie authored
llvm-svn: 191043
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- Sep 19, 2013
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Benjamin Kramer authored
llvm-svn: 191039
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David Blaikie authored
Based on code review feedback from Eric Christopher, unshifting these constants as they can appear in the gdb_index itself, shifted a further 24 bits. This means that keeping them preshifted is a bit inflexible, so let's not do that. Given the motivation, wrap up some nicer enums, more type safety, and some utility functions. llvm-svn: 191035
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Anders Waldenborg authored
Differential Revision: http://llvm-reviews.chandlerc.com/D1715 llvm-svn: 191030
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Anders Waldenborg authored
This avoids warnings when included in a application that uses -Wstrict-prototypes. Differential Revision: http://llvm-reviews.chandlerc.com/D1713 llvm-svn: 191029
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David Blaikie authored
Names open to bikeshedding. Could switch back to the constants being unshifted, but this way seems a bit easier to work with. llvm-svn: 191025
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Shuxin Yang authored
As its name suggests, this function will return all basic blocks dominated by a given block. llvm-svn: 191014
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Amara Emerson authored
llvm-svn: 190996
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Andrew Trick authored
Working on a better solution to this. This reverts commit 7d4e9934e7ca83094c5cf41346966c8350179ff2. llvm-svn: 190990
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Andrew Trick authored
This puts all the global PassManager debugging flags, like -print-after-all and -time-passes, behind a managed static. This eliminates their static initializers and, more importantly, exit-time destructors. The only behavioral change I anticipate is that tools need to initialize the PassManager before parsing the command line in order to export these options, which makes sense. Tools that already initialize the standard passes (opt/llc) don't need to do anything new. llvm-svn: 190974
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Adrian Prantl authored
Use the DIVariable::isIndirect() flag set by the frontend instead of guessing whether to set the machine location's indirection bit. Paired commit with CFE. llvm-svn: 190961
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- Sep 18, 2013
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Joey Gouly authored
Patch by Bradley Smith! llvm-svn: 190928
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Craig Topper authored
Fix X86 subtarget to not overwrite the autodetected features by calling InitMCProcessorInfo right after detecting them. Instead add a new function that only updates the scheduling model and call that. llvm-svn: 190919
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- Sep 17, 2013
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Arnold Schwaighofer authored
Upcoming SLP vectorization improvements will want to be able to estimate costs of horizontal reductions. Add infrastructure to support this. We model reductions as a series of (shufflevector,add) tuples ultimately followed by an extractelement. For example, for an add-reduction of <4 x float> we could generate the following sequence: (v0, v1, v2, v3) \ \ / / \ \ / + + (v0+v2, v1+v3, undef, undef) \ / ((v0+v2) + (v1+v3), undef, undef) %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7 %r = extractelement <4 x float> %bin.rdx8, i32 0 This commit adds a cost model interface "getReductionCost(Opcode, Ty, Pairwise)" that will allow clients to ask for the cost of such a reduction (as backends might generate more efficient code than the cost of the individual instructions summed up). This interface is excercised by the CostModel analysis pass which looks for reduction patterns like the one above - starting at extractelements - and if it sees a matching sequence will call the cost model interface. We will also support a second form of pairwise reduction that is well supported on common architectures (haddps, vpadd, faddp). (v0, v1, v2, v3) \ / \ / (v0+v1, v2+v3, undef, undef) \ / ((v0+v1)+(v2+v3), undef, undef, undef) %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef> %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 undef, i32 undef> %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1 %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1 %r = extractelement <4 x float> %bin.rdx.1, i32 0 llvm-svn: 190876
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Ben Langmuir authored
Add llvm.x86.* intrinsics for all of the Intel SHA Extensions instructions, as well as tests. Also remove mayLoad and hasSideEffects, which can be inferred from the instruction patterns. llvm-svn: 190864
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Craig Topper authored
llvm-svn: 190843
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Adrian Prantl authored
llvm-svn: 190826
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rdar://problem/14990587Adrian Prantl authored
A DBG_VALUE is register-indirect iff the first operand is a register _and_ the second operand is an immediate. llvm-svn: 190821
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Matt Arsenault authored
If there are no legal integers, assume 1 byte. This makes more sense than using the pointer size as a guess for the maximum GPR width. It is conceivable to want to use some 64-bit pointers on a target where 64-bit integers aren't legal. llvm-svn: 190817
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- Sep 16, 2013
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Peter Collingbourne authored
Previous discussion: http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/063909.html Differential Revision: http://llvm-reviews.chandlerc.com/D1191 llvm-svn: 190773
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