llvm-svn: 120298

shiftamount > 7.

llvm-svn: 120288

This speeds up selected test cases with up to
5% - no slowdowns observed.

llvm-svn: 120286

-return a sensible value for register pressure
-add pattern to 'ila' instrucion

llvm-svn: 120285

llvm-svn: 120284

llvm-svn: 120279

llvm-svn: 120278

llvm-svn: 120277

llvm-svn: 120272

llvm-svn: 120271

llvm-svn: 120263

instructions.  I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne".  The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.

llvm-svn: 120260

initializers of global variables used in the function.
Also make sure to emit the operands of a constant.

llvm-svn: 120253

llvm-svn: 120241

and at least the 4 byte one will be needed to implement the .cfi_* directives.

llvm-svn: 120240

llvm-svn: 120236

The op11_8 field is the same for all of them so put it in the instruction
classes instead of specifying it separately for each instruction.

llvm-svn: 120234

llvm-svn: 120233

llvm-svn: 120229

llvm-svn: 120228

llvm-svn: 120225

llvm-svn: 120224

llvm-svn: 120197

llvm-svn: 120194

I added these instructions recently but I have no idea where these "1"
values in the NextCycles field came from.  As far as I can tell now,
these instruction stages are clearly intended to overlap.

llvm-svn: 120193

 - I'm leaving MachO.h, because I believe it has external consumers, but I would really like to eliminate it (we have stylistic disagreements with one another).

llvm-svn: 120187

llvm-svn: 120168

llvm-svn: 120147

llvm-svn: 120146

Updating MBlaze .mask and .frame directives to match GCC's output and fixing regression introduced in 120095 by checking MCStreamer::hasRawTextSupport.

llvm-svn: 120097

1. Fixing error where basic block labels were not being printed out when they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots.
2. Re-adding .mask and .frame directives in printed assembly.
3. Adding .ent and .end directives in printed assembly.
4. Minor cleanups to MBlaze backend.

llvm-svn: 120095

llvm-svn: 120092

Fix by Visa Putkinen!

llvm-svn: 120090

E.g. -5 % 5 is 0 with srem and 1 with urem.

Also addresses Frits van Bommel's comments.

llvm-svn: 120049

llvm-svn: 120035

We need to check if the individual vector elements are sign/zero-extended
values.  For now this only handles constants values.  Radar 8687140.

llvm-svn: 120034

This allows to transform the rem in "1 << ((int)x % 8);" to an and.

llvm-svn: 120028

shifts.

llvm-svn: 120022

llvm-svn: 120017

llvm-svn: 120006