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  1. Feb 15, 2012
  2. Feb 09, 2012
  3. Feb 08, 2012
    • Andrew Trick's avatar
      Codegen pass definition cleanup. No functionality. · 1fa5bcbe
      Andrew Trick authored
      Moving toward a uniform style of pass definition to allow easier target configuration.
      Globally declare Pass ID.
      Globally declare pass initializer.
      Use INITIALIZE_PASS consistently.
      Add a call to the initializer from CodeGen.cpp.
      Remove redundant "createPass" functions and "getPassName" methods.
      
      While cleaning up declarations, cleaned up comments (sorry for large diff).
      
      llvm-svn: 150100
      1fa5bcbe
    • Brendon Cahoon's avatar
      Use TSFlag bit to describe instruction properties. · 6f358370
      Brendon Cahoon authored
      Creating the isPredicated TSFlag enables the code
      to use the property defined in the instruction format
      instead of using a large switch statement.
      
      llvm-svn: 150078
      6f358370
  4. Feb 07, 2012
  5. Feb 06, 2012
  6. Feb 05, 2012
  7. Feb 04, 2012
    • Andrew Trick's avatar
      TargetPassConfig: confine the MC configuration to TargetMachine. · f8ea108c
      Andrew Trick authored
      Passes prior to instructon selection are now split into separate configurable stages.
      Header dependencies are simplified.
      The bulk of this diff is simply removal of the silly DisableVerify flags.
      
      Sorry for the target header churn. Attempting to stabilize them.
      
      llvm-svn: 149754
      f8ea108c
  8. Feb 03, 2012
    • Andrew Trick's avatar
      Added TargetPassConfig. The first little step toward configuring codegen passes. · ccb67365
      Andrew Trick authored
      Allows command line overrides to be centralized in LLVMTargetMachine.cpp.
      LLVMTargetMachine can intercept common passes and give precedence to command line overrides.
      Allows adding "internal" target configuration options without touching TargetOptions.
      Encapsulates the PassManager.
      Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs.
      Allows modifying the target configuration hooks without rebuilding the world.
      
      llvm-svn: 149672
      ccb67365
  9. Feb 02, 2012
  10. Feb 01, 2012
  11. Jan 20, 2012
  12. Jan 18, 2012
    • Jakob Stoklund Olesen's avatar
      Add a CoveredBySubRegs property to Register descriptions. · f43b5995
      Jakob Stoklund Olesen authored
      When set, this bit indicates that a register is completely defined by
      the value of its sub-registers.
      
      Use the CoveredBySubRegs property to infer which super-registers are
      call-preserved given a list of callee-saved registers.  For example, the
      ARM registers D8-D15 are callee-saved.  This now automatically implies
      that Q4-Q7 are call-preserved.
      
      Conversely, Win64 callees save XMM6-XMM15, but the corresponding
      YMM6-YMM15 registers are not call-preserved because they are not fully
      defined by their sub-registers.
      
      llvm-svn: 148363
      f43b5995
  13. Jan 06, 2012
  14. Dec 27, 2011
  15. Dec 18, 2011
  16. Dec 16, 2011
  17. Dec 15, 2011
  18. Dec 13, 2011
    • Chandler Carruth's avatar
      Initial CodeGen support for CTTZ/CTLZ where a zero input produces an · 637cc6a8
      Chandler Carruth authored
      undefined result. This adds new ISD nodes for the new semantics,
      selecting them when the LLVM intrinsic indicates that the undef behavior
      is desired. The new nodes expand trivially to the old nodes, so targets
      don't actually need to do anything to support these new nodes besides
      indicating that they should be expanded. I've done this for all the
      operand types that I could figure out for all the targets. Owners of
      various targets, please review and let me know if any of these are
      incorrect.
      
      Note that the expand behavior is *conservatively correct*, and exactly
      matches LLVM's current behavior with these operations. Ideally this
      patch will not change behavior in any way. For example the regtest suite
      finds the exact same instruction sequences coming out of the code
      generator. That's why there are no new tests here -- all of this is
      being exercised by the existing test suite.
      
      Thanks to Duncan Sands for reviewing the various bits of this patch and
      helping me get the wrinkles ironed out with expanding for each target.
      Also thanks to Chris for clarifying through all the discussions that
      this is indeed the approach he was looking for. That said, there are
      likely still rough spots. Further review much appreciated.
      
      llvm-svn: 146466
      637cc6a8
    • NAKAMURA Takumi's avatar
  19. Dec 12, 2011
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