llvm-svn: 14474

float as a truncation by going through memory.  This truncation was being
skipped, which caused 175.vpr to fail after aggressive register promotion.

llvm-svn: 14473

llvm-svn: 14472

llvm-svn: 14471

llvm-svn: 14470

llvm-svn: 14469

llvm-svn: 14468

resolved by the static linker.

llvm-svn: 14467

will cause an infinite loop.  The link bit is only used for calling functions.

llvm-svn: 14466

llvm-svn: 14465

llvm-svn: 14464

llvm-svn: 14463

still overly conservative and uses very simple data structures, but it is a
start, and allows elimination of a lot of loads.

llvm-svn: 14462

llvm-svn: 14461

llvm-svn: 14460

llvm-svn: 14459

llvm-svn: 14458

and are a maintenence burden.  Nuke nuke nuke

llvm-svn: 14457

llvm-svn: 14456

llvm-svn: 14455

llvm-svn: 14454

llvm-svn: 14452

llvm-svn: 14451

llvm-svn: 14450

llvm-svn: 14449

llvm-svn: 14448

llvm-svn: 14447

llvm-svn: 14446

Allow copying of float registers.

llvm-svn: 14445

llvm-svn: 14444

llvm-svn: 14443

llvm-svn: 14442

If we see an "unknown operand", abort so it's easier to fix it.

llvm-svn: 14441

Support cast of ints (and narrower) to float and double.
Support cast double to double (using load and store).
Abort if we see a CallInst or SetCondInst with long/fp args, instead
of producing bad code.
Support add, sub, mul, div of float and double.

llvm-svn: 14440

map on the side, Instruction no longer has to be Annotable.  This reduces
the size of the Instruction class by another 4 bytes (on a 32-bit system).

llvm-svn: 14439

instructions.  Instead, keep a map of instructions -> MCFI objects in the
already sparc-specific class MachineFunctionInfo.  This will slow down the
sparc backend a bit, but it does not penalize the rest of LLVM!

llvm-svn: 14438

llvm-svn: 14437

llvm-svn: 14436

llvm-svn: 14435

This reduces the size of the instruction class by 4 bytes, and means that
isa<CallInst>(V) (for example) only needs to do one load from memory instead
of two.

llvm-svn: 14434