llvm-svn: 103677

lower them to the correct x86-64 instructions since we 
don't have a clean way to handle this in td files yet.
rdar://7947184

llvm-svn: 103668

part first.  rdar://7947184

llvm-svn: 103660

llvm-svn: 103535

be diced into atoms, and adjust getAtom() to take this into account.
 - This fixes relocations to symbols in fixed size literal sections, for
   example.

llvm-svn: 103532

llvm-svn: 103529

to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.

llvm-svn: 103495

Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.

llvm-svn: 103481

was unused. TargetMachine::getSubtarget() is used instead.

llvm-svn: 103474

changed dllexport code to use EmitBytes instead of EmitRawText, and changed the export option to use /EXPORT: instead of -export: on the windows platform

llvm-svn: 103377

llvm-svn: 103373

patch by Nathan Jeffords!

llvm-svn: 103346

llvm-svn: 103276

patch by Peter Housel!

llvm-svn: 103267

instruction, rather than a location near where the new instruction
is being inserted.

llvm-svn: 103232

 - This fixes "leal 0, %eax", for example.

llvm-svn: 103205

llvm-svn: 103199

and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.

llvm-svn: 103196

we don't currently support relaxing them.

llvm-svn: 103195

doesn't have to guess.

llvm-svn: 103194

llvm-svn: 103193

Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170.

llvm-svn: 103172

   Reverse-merging r103156 into '.':
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/ARMRegisterInfo.h
U    lib/Target/ARM/ARMBaseRegisterInfo.cpp
U    lib/Target/ARM/ARMBaseInstrInfo.cpp
U    lib/Target/ARM/ARMRegisterInfo.td

llvm-svn: 103159

that was causing PC-relative branch targets to be
evaluated incorrectly.  Also added support for
checking operand values to the llvm-mc tester.

llvm-svn: 103128

llvm-svn: 103103

hack the code to turn it off when debugging.

llvm-svn: 103083

llvm-svn: 103057

instructions which have no direct register usage.

Darwin 'as' accepts:
  add $0, (%rax)
but rejects
  mov $0, (%rax)
for example.

Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...

llvm-svn: 103015

 - The idea is that when a match fails, we just try to match each of +'b', +'w',
   +'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
   it. If all match, we assume it is width generic, and take the 'l' form.

 - This would be a horrible hack, if it weren't so simple. Therefore it is an
   elegant solution! Chris gets the credit for this particular elegant
   solution. :)

 - Next step to making this more robust is to have the X86 matcher generate the
   mnemonic prefix information. Ideally we would also compute up-front exactly
   which mnemonic to attempt to match, but this may require more custom code in
   the matcher than is really worth it.

llvm-svn: 103012

changed to 0x7E from 0x6E as well as the previous change of RPDI to S3SI.

llvm-svn: 102991

instructions as the Mac OS X darwin assembler.  Some of which like 'fcoml'
assembled to different opcodes.  While some of the suffixes were just different.

llvm-svn: 102958

mm to mm/m64 and the Move quadword from xmm2/mem64 to xmm1 had the incorrect
encodings.

llvm-svn: 102952

caused the a pushl instruction to be incorrectly encoding using only two bytes
of immediate, causing the following 2 instruction bytes to be part of the 32-bit
immediate value.  Also fixed the one byte form of push to be used when the
immediate would fit in a signed extended byte.  Lastly changed the names to not
include the 32 of PUSH32 since they actually push the size of the stack pointer.

llvm-svn: 102951

llvm-svn: 102941

changes before doing phi lowering for switches.

llvm-svn: 102809

on the original variables, so it's easier to see what is being done
to which blocks.

llvm-svn: 102759

llvm-svn: 102730

Another sibcall bug. If caller and callee calling conventions differ, then it's only safe to do a tail call if the results are returned in the same way.

llvm-svn: 102683

print randomly in debug output.

llvm-svn: 102668

	##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0
	##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0
	##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706
	##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0
	##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0

llvm-svn: 102655