llvm-svn: 100042

llvm-svn: 100037

llvm-svn: 100033

llvm-svn: 100031

llvm-svn: 100016

llvm-svn: 99975

llvm-svn: 99974

llvm-svn: 99954

Since it is just a pxor in disguise, we should probably expand it to a full
polymorphic triple.

llvm-svn: 99953

SSEDomainFix will collapse to the domain with the lower number when it has a
choice. The SSEPackedSingle domain often has smaller instructions, so prefer
that.

llvm-svn: 99952

llvm-svn: 99948

Not running 'make check-all' before committing is a bad idea.

llvm-svn: 99933

llvm-svn: 99931

e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
A update of langref will occur in a subsequent checkin.

llvm-svn: 99928

llvm-svn: 99916

Rewrite the pmulld patterns, and make sure that they fold in loads of
arguments into the instruction.

llvm-svn: 99910

create symbols.  It is extremely error prone and a source of a lot
of the remaining integrated assembler bugs on x86-64.

This fixes rdar://7807601.

llvm-svn: 99902

to be fixed any time soon.

llvm-svn: 99888

MCContext. There is still one leak left in PIC16Section (the Items vector).

llvm-svn: 99887

llvm-svn: 99859

llvm-svn: 99855

Cross-block inference is primitive and wrong, but the pass is working otherwise.

llvm-svn: 99848

makes calls a little bit more consistent and allows easy removal of the
specializations in the future. Convert all callers to the templated functions.

llvm-svn: 99838

the SDNodes.

llvm-svn: 99835

Most of these were unused, some of them were wrong and unused (isS16Constant<short>,
isS10Constant<short>).

llvm-svn: 99827

"the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions:
-in vararg handling, registers are marked to be live, to not confuse the register scavenger
-function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the register scavenger emergency spill slot, which is not used as there is no stack."

llvm-svn: 99819

llvm-svn: 99815

These instructions use byte index in a control vector (M:Vm) to lookup byte
values in a table and generate a new vector (D:Vd).  The table is specified via
a list of vectors, which can be:

{Dn}
{Dn D<n+1>}
{Dn D<n+1> D<n+2>}
{Dn D<n+1> D<n+2> D<n+3>}

llvm-svn: 99789

llvm-svn: 99770

llvm-svn: 99760

matchable: it seems like it would always constant fold.

llvm-svn: 99758

this also depends on the new "bitconvert dropping" behavior just
added to tblgen.

llvm-svn: 99757

llvm-svn: 99755

input to be v8i8 or v16i8, which buildvectors get canonicalized to.

This allows the patterns that were previously using a bare 'vnot' to
match, before they couldn't.

llvm-svn: 99754

patterns that would never match because of bitcast, and eliminating use
of vnot_conv.

llvm-svn: 99753

llvm-svn: 99750

*input* of other type, which is the VT. 

llvm-svn: 99749

llvm-svn: 99748

llvm-svn: 99743

their flags correctly.

llvm-svn: 99738