Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immediate rw. There is currently no intrinsic that matches to pli.

llvm-svn: 118237

Right now the code is partitioned but the behavior is the same.
This should be improved in the near future.   This removes some
uses of TheOperandList.

llvm-svn: 118232

it doesn't do any lexical stuff anymore.

llvm-svn: 118230

llvm-svn: 118228

on the incoming operand list.  This also makes the code simpler.

llvm-svn: 118225

 - Primarily useful for running some code with a specified stack size, when
   pthreads are available.

llvm-svn: 118222

tweaking when we start using it for object file emission or JIT, but it's a
start.

llvm-svn: 118221

llvm-svn: 118220

llvm-svn: 118219

now matchables contain an explicit list of how to populate each
operand in the result instruction instead of having them somehow
magically be correlated to the input inst.

llvm-svn: 118217

This way, InlineSpiller does the same amount of splitting as the standard
spiller. Splitting should really be guided by the register allocator, and
doesn't belong in the spiller at all.

llvm-svn: 118216

CodeEmitter.

llvm-svn: 118209

llvm-svn: 118207

Fixups list for the instruction so the operand encoders can add to it as
needed.

llvm-svn: 118206

This is both the conceptually correct place for it, as well as allowing it to be more aggressive.

llvm-svn: 118204

We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.

llvm-svn: 118201

llvm-svn: 118199

just do it earlier too.

llvm-svn: 118195

splitting needs them.

llvm-svn: 118194

llvm-svn: 118193

llvm-svn: 118192

llvm-svn: 118190

llvm-svn: 118187

all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.

llvm-svn: 118183

on non-X86 hosts.  Hopefully fixes ppc-host buildbot.

llvm-svn: 118182

llvm-svn: 118176

For NEON we had been assuming this was always an immediate constant.

llvm-svn: 118175

Makes it more clear that it is just a path manipulation function.

llvm-svn: 118174

llvm-svn: 118173

the code more self-documenting.

llvm-svn: 118171

with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.

llvm-svn: 118169

llvm-svn: 118168

value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.

llvm-svn: 118167

this by using an undef as a pointer.

Fixes rdar://8625016

llvm-svn: 118164

llvm-svn: 118163

Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing.

llvm-svn: 118160

llvm-svn: 118152

llvm-svn: 118151

easier to read.

llvm-svn: 118148

    vldr.64 d1, [r0, #-32]

The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.

llvm-svn: 118144